ZHCSJX4B June   2012  – June 2019 LMR10530

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      典型应用
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Descriptions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Ratings
    3. 6.3 Electrical Characteristics
    4. 6.4 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Frequency Foldback
      2. 7.3.2 Load Step Response
      3. 7.3.3 Output Overvoltage Protection
      4. 7.3.4 Undervoltage Lockout
      5. 7.3.5 Current Limit
      6. 7.3.6 Soft Start/Shutdown
      7. 7.3.7 Thermal Shutdown
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1 Custom Design With WEBENCH® Tools
        2. 8.2.1.2 Inductor Selection
        3. 8.2.1.3 Input Capacitor
        4. 8.2.1.4 Output Capacitor
        5. 8.2.1.5 Catch Diode
        6. 8.2.1.6 Output Voltage
        7. 8.2.1.7 Efficiency Estimation
      2. 8.2.2 Application Curve
      3. 8.2.3 Other System Examples
        1. 8.2.3.1 LMR10530X Design Example 1
        2. 8.2.3.2 LMR10530X Design Example 2
        3. 8.2.3.3 LMR10530Y Design Example 3
        4. 8.2.3.4 LMR10530Y Design Example 4
  9. 9 Layout
    1. 9.1 Layout Considerations
  10. 10器件和文档支持
    1. 10.1 器件支持
      1. 10.1.1 第三方产品免责声明
      2. 10.1.2 开发支持
        1. 10.1.2.1 使用 WEBENCH® 工具创建定制设计
    2. 10.2 接收文档更新通知
    3. 10.3 社区资源
    4. 10.4 商标
    5. 10.5 静电放电警告
    6. 10.6 Glossary
  11. 11机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Pin Configuration and Functions

DSC Package
10-Pin WSON
Top View
LMR10530 30167303.gif

Pin Descriptions

PIN DESCRIPTION
NO. NAME
1 VINC Input supply for internal bias and control circuitry. Need to locally bypass this pin to GND.
2 EN Enable control input. Logic high enables operation. Do not allow this pin to float or subject to voltages greater than VIN + 0.3V.
3 SGND Signal (analog) ground. Place the bottom resistor of the feedback network as close as possible to this pin for good load regulation.
4 NC No user function, connect this pin to GND.
5 FB Feedback pin. Connect this pin to the external resistor divider to set output voltage.
6 PGND Power ground pin. Provides ground return path for the internal driver.
7, 8 SW Switch pins. Connect these pins to the inductor and catch diode.
9, 10 VIND Input supply voltage. Connect a bypass capacitor locally from these pins to PGND.
DAP Die Attach Pad Connect to system ground for low thermal impedance, but it cannot be used as a primary GND connection.