ZHCSJX4B June   2012  – June 2019 LMR10530

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      典型应用
  4. 修订历史记录
  5. Pin Configuration and Functions
    1.     Pin Descriptions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Ratings
    3. 6.3 Electrical Characteristics
    4. 6.4 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Frequency Foldback
      2. 7.3.2 Load Step Response
      3. 7.3.3 Output Overvoltage Protection
      4. 7.3.4 Undervoltage Lockout
      5. 7.3.5 Current Limit
      6. 7.3.6 Soft Start/Shutdown
      7. 7.3.7 Thermal Shutdown
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1 Custom Design With WEBENCH® Tools
        2. 8.2.1.2 Inductor Selection
        3. 8.2.1.3 Input Capacitor
        4. 8.2.1.4 Output Capacitor
        5. 8.2.1.5 Catch Diode
        6. 8.2.1.6 Output Voltage
        7. 8.2.1.7 Efficiency Estimation
      2. 8.2.2 Application Curve
      3. 8.2.3 Other System Examples
        1. 8.2.3.1 LMR10530X Design Example 1
        2. 8.2.3.2 LMR10530X Design Example 2
        3. 8.2.3.3 LMR10530Y Design Example 3
        4. 8.2.3.4 LMR10530Y Design Example 4
  9. Layout
    1. 9.1 Layout Considerations
  10. 10器件和文档支持
    1. 10.1 器件支持
      1. 10.1.1 第三方产品免责声明
      2. 10.1.2 开发支持
        1. 10.1.2.1 使用 WEBENCH® 工具创建定制设计
    2. 10.2 接收文档更新通知
    3. 10.3 社区资源
    4. 10.4 商标
    5. 10.5 静电放电警告
    6. 10.6 Glossary
  11. 11机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Overview

The LMR10530 is a constant frequency PWM buck regulator IC that delivers a 3-A load current. The regulator is available in preset switching frequencies of 1.5 MHz or 3 MHz. This high frequency allows the LMR10530 to operate with small surface mount capacitors and inductors, resulting in a DC/DC converter that requires a minimum amount of board space. The LMR10530 is internally compensated, therefore it is simple to use and requires few external components. The LMR10530 uses peak current-mode control to regulate the output voltage. The following description of operation of the LMR10530 will refer to the Figure 30, to the waveforms in Figure 20 and simplified block diagram in Functional Block Diagram. The LMR10530 supplies a regulated output voltage by switching the internal PMOS power switch at a constant frequency and variable duty cycle. A switching cycle begins at the falling edge of the reset pulse generated by the internal oscillator. When this pulse goes low, the output control logic turns on the internal PMOS power switch. During this on-time, the SW pin voltage (VSW) swings up to approximately VIN, and the inductor current (IL) increases with a linear slope. IL is measured by the current sense amplifier, which generates an output proportional to the switch current. The sense signal is summed with the regulator’s corrective ramp and compared to the error amplifier’s output, which is proportional to the difference between the feedback voltage and VREF. When the PWM comparator output goes high, the internal power switch turns off until the next switching cycle begins. During the switch off-time, the inductor current discharges through the catch diode D1, which forces the SW pin to swing below ground by the forward voltage (VD) of the catch diode. The regulator loop adjusts the duty cycle (D) to maintain a constant output voltage.

LMR10530 30167366.gifFigure 20. Typical Waveforms