Take care to minimize the loop area formed by the bypass capacitor connection between supply pins and ground. Use a ground plane underneath the device; best practice is for any bypass components to ground to have a nearby via to the ground plane. The optimum bypass capacitor placement is closest to the corresponding supply pin. Use of thicker traces from the bypass capacitors to the corresponding supply pins lowers the power-supply inductance and provides a more stable power supply. Decoupling capacitors in excess of 100nF must be distanced from the supply pins, or have sufficient series isolation resistance, to reduce the peak discharge current in the event of an SET. To minimize stray parasitics, place the feedback components as close as possible to the device.

The LMP7704-SP features a backside thermal pad, to better facilitate the evacuation of heat from the die. The thermal pad is electrically shorted to the topside metal lid. The pad is thermally conductive but electrically high-impedance to the device substrate. To simplify fault planning scenarios, reduce parasitic capacitance, and prevent the formation of leakage paths, solder the thermal pad to the PCB and bias the thermal pad to V–.