SNVSD17 April   2026 LM5192-Q1

ADVANCE INFORMATION  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Related Products
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements for the Serial Control Bus
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Input Voltage Range (VIN)
      2. 7.3.2  High-Voltage Bias Supply Regulators (VCC, VDDA)
      3. 7.3.3  Enable (EN)
      4. 7.3.4  Switching Frequency
      5. 7.3.5  Dual Random Spread Spectrum (DRSS)
      6. 7.3.6  Soft Start
      7. 7.3.7  Output Voltage
      8. 7.3.8  Minimum Controllable On-Time
      9. 7.3.9  Dual Loop Architecture
        1. 7.3.9.1 Voltage Loop Error Amplifier
        2. 7.3.9.2 Current Loop Error Amplifier
      10. 7.3.10 Programmable ILIM
      11. 7.3.11 IOUT Monitor
      12. 7.3.12 Cable Drop Compensation
      13. 7.3.13 Slope Compensation
      14. 7.3.14 Shunt Current Sensing
      15. 7.3.15 Hiccup Mode Current Limiting
      16. 7.3.16 Device Configuration (CFG)
      17. 7.3.17 Pulse Frequency Modulation (PFM) / Synchronization
      18. 7.3.18 Thermal Shutdown (TSD)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Ready Mode
      4. 7.4.4 Active Mode
      5. 7.4.5 Sleep Mode
  9. LM5192-Q1 Registers
  10. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Powertrain Components
        1. 9.1.1.1 Buck Inductor
        2. 9.1.1.2 Output Capacitors
        3. 9.1.1.3 Input Capacitors
        4. 9.1.1.4 Power MOSFETs
        5. 9.1.1.5 EMI Filter
      2. 9.1.2 Error Amplifier and Compensation
    2. 9.2 Typical Application
      1. 9.2.1 High Efficiency, Wide Input, 400kHz, Synchronous Buck Regulator
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Buck Inductor
          2. 9.2.1.2.2 Current-Sense Resistance
          3. 9.2.1.2.3 Output Capacitors
          4. 9.2.1.2.4 Input Capacitors
          5. 9.2.1.2.5 Compensation Components
        3. 9.2.1.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 Power Stage Layout
        2. 9.4.1.2 Gate-Drive Layout
        3. 9.4.1.3 PWM Controller Layout
        4. 9.4.1.4 Thermal Design and Layout
        5. 9.4.1.5 Ground Plane Design
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
        1. 10.2.1.1 PCB Layout Resources
        2. 10.2.1.2 Thermal Design Resources
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information

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Power Supply Recommendations

The device is designed to operate from a wide input supply voltage range . The input supply must be capable of delivering the required input supply current to the fully loaded regulator over the wide input voltage range. Estimate the average input supply current using Equation 46.

Equation 46. I S U P P L Y = V L O A D × I L O A D V S U P P L Y × E f f i c i e n c y

If the regulator is connected to an input supply through long wires or PCB traces with a large impedance, take special care to achieve stable performance. The parasitic inductance and resistance of the input cables can have an adverse affect on converter operation. The parasitic inductance in combination with the low-ESR ceramic input capacitors form an underdamped resonant circuit. This circuit can cause overvoltage transients at the regulator input each time the input supply is cycled ON and OFF. The parasitic resistance causes the input supply voltage to dip during a load transient. The best way to solve such issues is to reduce the distance from the input supply to the regulator and use an aluminum or tantalum input capacitor in parallel with the ceramics. The moderate ESR of the electrolytic capacitors helps damp the input resonant circuit and reduce any voltage overshoots.

An EMI input filter is often used in front of the regulator that, unless carefully designed, can lead to instability as well as some of the effects mentioned above. The AN-2162 Simple Success With Conducted EMI From DCDC Converters application note provides helpful suggestions when designing an input filter for any switching regulator.