ZHCSFJ0B August   2016  – February 2017 LM27762

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout
      2. 7.3.2 Input Current Limit
      3. 7.3.3 PFM Operation
      4. 7.3.4 Output Discharge
      5. 7.3.5 Power Good Output (PGOOD)
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Enable Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Positive Low-Dropout Linear Regulator and OUT+ Voltage Setting
        3. 8.2.2.3 Charge-Pump Voltage Inverter
        4. 8.2.2.4 Negative Low-Dropout Linear Regulator and OUT- Voltage Setting
        5. 8.2.2.5 External Capacitor Selection
          1. 8.2.2.5.1 Charge-Pump Output Capacitor
          2. 8.2.2.5.2 Input Capacitor
          3. 8.2.2.5.3 Flying Capacitor
          4. 8.2.2.5.4 LDO Output Capacitor
        6. 8.2.2.6 Power Dissipation
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 开发支持
        1. 11.1.1.1 使用 WEBENCH® 工具创建定制设计
    2. 11.2 接收文档更新通知
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The LM27762 input voltage range is from 2.7 V to 5.5 V. The positive LDO provides a positive voltage configurable with external gain setting resistors R1, R2. The low-noise charge-pump voltage converter inverts the input voltage V to a negative output voltage. Charge pump is followed by the negative LDO which regulates a negative output voltage configurable with external gain setting resistors R3, R4. Output voltage range is ± 1.5 V to ± 5 V. When selecting input (VIN) and output (OUT+, OUT-) voltages ranges, headroom required by the charge pump and LDOs must to be considered. Charge-pump minimum headroom can be estimated based on the maximum load current and charge pump output resistance.

The device uses five low-cost capacitors to provide up to 250 mA of output current. The LM27762 operates at a 2-MHz oscillator frequency to reduce charge-pump output resistance and voltage ripple under heavy loads. When using the optional open-drain PGOOD feature, connect a 10-kΩ pullup resistor (RPU) to VIN. Connect pin to ground if PGOOD is not used.

8.2 Typical Application

LM27762 typ_app_snvsaf7.gif Figure 12. LM27762 Typical Application

8.2.1 Design Requirements

The following example describes powering an amplifier driving high impedance headphones. Input voltage is from a smart-phone battery. Amplifier is driving 2-VRMS to 600-Ω stereo headphones.

Table 2. Application Example Design Parameters

DESIGN PARAMETER EXAMPLE VALUE
Input voltage 3.3 V to 4.2 V
Output voltage ±3 V
Output current 10 mA (LM27762 capability 250 mA maximum)
CVIN, COUT+, COUT– 2.2 μF
CCP 4.7 μF
RPU 10 kΩ (optional, connect PGOOD pin to ground if feature is not used)

8.2.2 Detailed Design Procedure

8.2.2.1 Custom Design With WEBENCH® Tools

Click here to create a custom design using the LM27762 device with the WEBENCH® Power Designer.

  1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
  2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
  3. Compare the generated design with other possible solutions from Texas Instruments.

The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time pricing and component availability.

In most cases, these actions are available:

  • Run electrical simulations to see important waveforms and circuit performance.
  • Run thermal simulations to understand board thermal performance.
  • Export customized schematic and layout into popular CAD formats.
  • Print PDF reports for the design, and share the design with colleagues.

Get more information about WEBENCH tools at www.ti.com/WEBENCH.

8.2.2.2 Positive Low-Dropout Linear Regulator and OUT+ Voltage Setting

LM27762 features a low-dropout, linear positive voltage regulator (LDO). The LDO output is rated for a current of 250 mA. This LDO allows the device to provide a very low noise output, low output voltage ripple, high PSRR, and low line or load transient response.

The positive output voltage of the LM27762 is externally configurable. The value of R1 and R2 determines the output voltage setting. The output voltage can be calculated using Equation 1:

Equation 1. VOUT = 1.2 V × (R1 + R2) / R2

The value for R2 must be no less than 50 kΩ.

8.2.2.3 Charge-Pump Voltage Inverter

The main application of the LM27762 is to generate a regulated negative supply voltage. The voltage inverter circuit uses only three external capacitors, and the LDO regulator circuit uses one additional output capacitor.

The voltage inverter portion of the LM27761 contains four large CMOS switches which are switched in sequence to invert the input supply voltage. Energy transfer and storage are provided by external capacitors. Figure 13 shows the voltage switches S2 and S4 are open. In the second time interval, S1 and S3 are open; at the same time, S2 and S4 are closed, and C1 is charging CCP. After a number of cycles, the voltage across CCP is pumped into VIN. Because the anode of CCP is connected to ground, the output at the cathode of CCP equals –(VIN) when there is no load current. When a load is added, the output voltage drop is determined by the parasitic resistance (RDSON of the MOSFET switches and the equivalent series resistance (ESR) of the capacitors) and the charge transfer loss between the capacitors.

LM27762 switches_SNVSAF7.gif Figure 13. Voltage Inverting Principle

The output characteristic of this circuit can be approximated by an ideal voltage source in series with a resistance. The voltage source equals –(VIN). The output resistance ROUT is a function of the ON resistance of the internal MOSFET switches, the oscillator frequency, the capacitance, and the ESR of C1 and CCP. Because the switching current charging and discharging C1 is approximately twice as the output current, the effect of the ESR of the pumping capacitor C1 is multiplied by four in the output resistance. The charge-pump output capacitor CCP is charging and discharging at a current approximately equal to the output current; therefore, its ESR only counts once in the output resistance. A good approximation of charge-pump ROUT is shown in Equation 2:

Equation 2. ROUT = (2 × RSW) + [1 / (ƒSW × C1)] + (4 × ESRC1) + ESRCCP

where

  • RSW is the sum of the ON resistance of the internal MOSFET switches shown in Figure 13.

High capacitance and low-ESR ceramic capacitors reduce the output resistance.

8.2.2.4 Negative Low-Dropout Linear Regulator and OUT– Voltage Setting

At the output of the inverting charge-pump the LM27762 features a low-dropout, linear negative voltage regulator (LDO). The LDO output is rated for a current of 250 mA. This negative LDO allows the device to provide a very low noise output, low output voltage ripple, high PSRR, and low line or load transient response.

The negative output voltage of the LM27762 is externally configurable. The value of R3 and R4 determines the output voltage setting. The output voltage can be calculated using Equation 1:

Equation 3. VOUT = –1.22 V × (R3 + R4) / R4

The value for R4 must be no less than 50 kΩ.

8.2.2.5 External Capacitor Selection

The LM27762 requires 5 external capacitors for proper operation. Surface-mount multi-layer ceramic capacitors are recommended. These capacitors are small, inexpensive, and have very low ESR (≤ 15 mΩ typical). Tantalum capacitors, OS-CON capacitors, and aluminum electrolytic capacitors generally are not recommended for use with the LM27762 due to their high ESR compared to ceramic capacitors.

For most applications, ceramic capacitors with an X7R or X5R temperature characteristic are preferable for use with the LM27762. These capacitors have tight capacitance tolerances (as good as ±10%) and hold their value over temperature (X7R: ±15% over –55°C to +125°C; X5R ±15% over –55°C to +85°C).

Using capacitors with a Y5V or Z5U temperature characteristic is generally not recommended for the LM27762. These capacitors typically have wide capacitance tolerance (80%, ….20%) and vary significantly over temperature (Y5V: 22%, –82% over –30°C to +85°C range; Z5U: 22%, –56% over 10°C to 85°C range). Under some conditions a 1-µF-rated Y5V or Z5U capacitor could have a capacitance as low as 0.1 µF. Such detrimental deviation is likely to cause Y5V and Z5U capacitors to fail to meet the minimum capacitance requirements of the LM27762.

Net capacitance of a ceramic capacitor decreases with increased DC bias. This degradation can result in lower-than-expected capacitance on the input and/or output, resulting in higher ripple voltages and currents. Using capacitors at DC bias voltages significantly below the capacitor voltage rating usually minimizes DC bias effects. Consult capacitor manufacturers for information on capacitor DC bias characteristics.

Capacitance characteristics can vary quite dramatically with different application conditions, capacitor types, and capacitor manufacturers. TI strongly recommends that the LM27762 circuit be evaluated thoroughly early in the design-in process with the mass-production capacitor of choice. This helps ensure that any such variability in capacitance does not negatively impact circuit performance.

8.2.2.5.1 Charge-Pump Output Capacitor

In typical applications, Texas Instruments recommends a 4.7-µF low-ESR ceramic charge-pump output capacitor (CCP). Different output capacitance values can be used to reduce charge pump ripple, shrink the solution size, and/or cut the cost of the solution. However, changing the output capacitor may also require changing the flying capacitor or input capacitor to maintain good overall circuit performance.

In higher-current applications, a 10-µF, 10-V low-ESR ceramic output capacitor is recommended. If a small output capacitor is used, the output ripple can become large during the transition between PFM mode and constant switching. To prevent toggling, a 2-µF capacitance is recommended. For example, 10-µF, 10-V output capacitor in a 0402 case size typically has only 2-µF capacitance when biased to 5 V.

8.2.2.5.2 Input Capacitor

The input capacitor (C2) is a reservoir of charge that aids in a quick transfer of charge from the supply to the flying capacitors during the charge phase of operation. The input capacitor helps to keep the input voltage from drooping at the start of the charge phase when the flying capacitors are connected to the input. It also filters noise on the input pin, keeping this noise out of the sensitive internal analog circuitry that is biased off the input line.

Input capacitance has a dominant and first-order effect on the input ripple magnitude. Increasing (decreasing) the input capacitance results in a proportional decrease (increase) in input voltage ripple. Input voltage, output current, and flying capacitance also affects input ripple levels to some degree.

In typical applications, a 4.7-µF low-ESR ceramic capacitor is recommended on the input. When operating near the maximum load of 250 mA, after taking into the DC bias derating, a minimum recommended input capacitance is 2 µF or larger. Different input capacitance values can be used to reduce ripple, shrink the solution size, and/or cut the cost of the solution.

8.2.2.5.3 Flying Capacitor

The flying capacitor (C1) transfers charge from the input to the output. Flying capacitance can impact both output current capability and ripple magnitudes. If flying capacitance is too small, the LM27762 may not be able to regulate the output voltage when load currents are high. On the other hand, if the flying capacitance is too large, the flying capacitor might overwhelm the input and charge pump output capacitors, resulting in increased input and output ripple.

In typical high-current applications, 0.47-µF or 1-µF 10-V low-ESR ceramic capacitors are recommended for the flying capacitors. Polarized capacitors (tantalum, aluminum, electrolytic, etc.) must not be used for the flying capacitor, as they could become reverse-biased during LM27762 operation.

8.2.2.5.4 LDO Output Capacitor

The LDO output capacitor (COUT+, COUT-) value and the ESR affect stability, output ripple, output noise, PSRR and transient response. The LM27762 only requires the use of a 2.2-µF ceramic output capacitor for stable operation. For typical applications, a 2.2-µF ceramic output capacitor located close to the output is sufficient.

8.2.2.6 Power Dissipation

The allowed power dissipation for any package is a measure of the ability of the device to pass heat from the junctions of the device to the heatsink and the ambient environment. Thus, the power dissipation is dependent on the ambient temperature and the thermal resistance across the various interfaces between the die junction and ambient air.

The maximum allowable power dissipation can be calculated by Equation 4:

Equation 4. PD-MAX = (TJ-MAX – TA) / RθJA

The actual power being dissipated in the device can be represented by Equation 5:

Equation 5. PD = PIN – POUT = VIN × (–IOUT– + IOUT+ + IQ) – (VOUT+ × IOUT+ + VOUT– × IOUT–)

Equation 4 and Equation 5 establish the relationship between the maximum power dissipation allowed due to thermal consideration, the voltage drop across the device, and the continuous current capability of the device. These equations must be used to determine the optimum operating conditions for the device in a given application.

In lower power dissipation applications the maximum ambient temperature (TA-MAX) may be increased. In higher power dissipation applications the maximum ambient temperature(TA-MAX) may have to be derated. TA-MAX can be calculated using Equation 6:

Equation 6. TA-MAX = TJ-MAX-OP – (RθJA × PD-MAX)

where

  • TJ-MAX-OP = maximum operating junction temperature (125°C)
  • PD-MAX = the maximum allowable power dissipation
  • RθJA = junction-to-ambient thermal resistance of the package

Alternately, if TA-MAX cannot be derated, the power dissipation value must be reduced. This can be accomplished by reducing the input voltage as long as the minimum VIN is not violated, or by reducing the output current, or some combination of the two.

8.2.3 Application Curves

Refer also to Typical Characteristics

LM27762 D023_SNVSAF7.gif Figure 14. PSRR for OUT-
LM27762 D024_SNVSAF7.gif Figure 15. PSRR for OUT+