ZHCSTL8F April   2007  – November 2023 LM25116

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 High-Voltage Start-Up Regulator
      2. 6.3.2 Enable
      3. 6.3.3 UVLO
      4. 6.3.4 Oscillator and Sync Capability
      5. 6.3.5 Error Amplifier and PWM Comparator
      6. 6.3.6 Ramp Generator
      7. 6.3.7 Current Limit
      8. 6.3.8 HO Output
      9. 6.3.9 Thermal Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Soft Start and Diode Emulation
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1  Timing Resistor
        2. 7.2.2.2  Output Inductor
        3. 7.2.2.3  Current Sense Resistor
        4. 7.2.2.4  Ramp Capacitor
        5. 7.2.2.5  Output Capacitors
        6. 7.2.2.6  Input Capacitors
        7. 7.2.2.7  VCC Capacitor
        8. 7.2.2.8  Bootstrap Capacitor
        9. 7.2.2.9  Soft Start Capacitor
        10. 7.2.2.10 Output Voltage Divider
        11. 7.2.2.11 UVLO Divider
        12. 7.2.2.12 MOSFETs
        13. 7.2.2.13 MOSFET Snubber
        14. 7.2.2.14 Error Amplifier Compensation
        15. 7.2.2.15 Comprehensive Equations
          1. 7.2.2.15.1 Current Sense Resistor and Ramp Capacitor
          2. 7.2.2.15.2 Modulator Transfer Function
          3. 7.2.2.15.3 Error Amplifier Transfer Function
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 接收文档更新通知
    2. 8.2 支持资源
    3. 8.3 Trademarks
    4. 8.4 静电放电警告
    5. 8.5 术语表
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

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7.4.1 Layout Guidelines

In a buck regulator the primary switching loop consists of the input capacitor, MOSFETs and current sense resistor. Minimizing the area of this loop reduces the stray inductance and minimizes noise and possible erratic operation. The input capacitor must be placed as close as possible to the MOSFETs, with the VIN side of the capacitor connected directly to the high-side MOSFET drain, and the GND side of the capacitor connected as close as possible to the low-side source or current sense resistor ground connection. A ground plane in the PC board is recommended as a means to connect the quiet end (input voltage ground side) of the input filter capacitors to the output filter capacitors and the PGND pin of the regulator. Connect all of the low power ground connections (CSS, RT, CRAMP) directly to the regulator AGND pin. Connect the AGND and PGND pins together through to a topside copper area covering the entire underside of the device. Place several vias in this underside copper area to the ground plane.

The highest power dissipating components are the two power MOSFETs. The easiest way to determine the power dissipated in the MOSFETs is to measure the total conversion losses (PIN – POUT), then subtract the power losses in the output inductor and any snubber resistors. The resulting power losses are primarily in the switching MOSFETs.

If a snubber is used, the power loss can be estimated with an oscilloscope by observation of the resistor voltage drop at both turnon and turnoff transitions. Assuming that the RC time constant is < 1 / fSW.

Equation 51. P = C × V2 × fSW

The regulator has an exposed thermal pad to aid power dissipation. Selecting MOSFETs with exposed pads aid the power dissipation of these devices. Careful attention to RDS(ON) at high temperature must be observed. Also, at 250 kHz, a MOSFET with low gate capacitance result in lower switching losses.