ZHCSFN6F March   2007  – June 2021 INA203 , INA204 , INA205

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: Current-Shunt Monitor
    6. 6.6 Electrical Characteristics: Comparator
    7. 6.7 Electrical Characteristics: Reference
    8. 6.8 Electrical Characteristics: General
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Basic Connections
      2. 7.3.2 Selecting RSHUNT
      3. 7.3.3 Comparator
      4. 7.3.4 Comparator Delay (14-Pin Version Only)
      5. 7.3.5 Comparator Maximum Input Voltage Range
    4. 7.4 Device Functional Modes
      1. 7.4.1 Input Filtering
      2. 7.4.2 Accuracy Variations as a Result Of VSENSE and Common-Mode Voltage
        1. 7.4.2.1 Normal Case 1: VSENSE ≥ 20 mV, VCM ≥ VS
        2. 7.4.2.2 Normal Case 2: VSENSE ≥ 20 mV, VCM < VS
        3. 7.4.2.3 Low VSENSE Case 1
        4. 7.4.2.4 Low VSENSE Case 2: VSENSE < 20 mV, 0 V ≤ VCM ≤ VS
      3. 7.4.3 Transient Protection
      4. 7.4.4 Output Voltage Range
      5. 7.4.5 Reference
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 术语表
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • D|14
  • DGS|10
  • PW|14
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.4.2.4 Low VSENSE Case 2: VSENSE < 20 mV, 0 V ≤ VCM ≤ VS

This region of operation is the least accurate for the INA203 family. To achieve the wide input common-mode voltage range, these devices use two op amp front ends in parallel. One operational amplifier front end operates in the positive input common-mode voltage range, and the other in the negative input region. For this case, neither of these two internal amplifiers dominates and overall loop gain is very low. Within this region, VOUT approaches voltages close to linear operation levels for Normal Case 2. This deviation from linear operation becomes greatest the closer VSENSE approaches 0 V. Within this region, as VSENSE approaches 20 mV, device operation is closer to that described by Normal Case 2. Figure 7-12 illustrates this behavior for the INA205. The VOUT maximum peak for this case is tested by maintaining a constant VS, setting VSENSE = 0 mV, and sweeping VCM from 0 V to VS. The exact VCM at which VOUT peaks during this test varies from part to part, but the VOUT maximum peak is tested to be less than the specified VOUT Tested Limit.

GUID-6BF57560-7A13-42CC-9F07-A9B4D8B2FBCD-low.gifFigure 7-12 Example For Low VSENSE Case 2 (INA205, Gain = 100)