ZHCSA87F August 2012 – June 2019 DLP7000
The DLPA200 generates three voltages: VBIAS, VRESET, and VOFFSET that are supplied to the DMD MBRST lines in various sequences through the Micromirror Clocking Pulse driver function. VOFFSET is also supplied directly to the DMD as DMDVCC2. A fourth DMD power supply, DMDVCC, is supplied directly to the DMD by regulators.
The function of the Micromirror Clocking Pulse driver is to switch selected outputs in patterns between the three voltage levels (VBIAS, VRESET and VOFFSET) to generate one of several Micromirror Clocking Pulse waveforms. The order of these Micromirror Clocking Pulse waveform events is controlled externally by the logic control inputs and timed by the STROBE signal. DLPC410 automatically detects the DMD type and then uses the DMD type to determine the appropriate Micromirror Clocking Pulse waveform.
A direct Micromirror Clocking Pulse operation causes a mirror to transition directly from one latched state to the next. The address must already be set up on the mirror electrodes when the Micromirror Clocking Pulse is initiated. Where the desired mirror display period does not allow for time to set up the address, a Micromirror Clocking Pulse with release can be performed. This operation allows the mirror to go to a relaxed state regardless of the address while a new address is set up, after which the mirror can be driven to a new latched state.
A mirror in the relaxed state typically reflects light into a system collection aperture and can be thought of as “off” although the light is likely to be more than a mirror latched in the “off” state. System designers should carefully evaluate the impact of relaxed mirror conditions on optical performance.