ZHCSL02C March   2020  – March 2023 DLP3021-Q1

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  Storage Conditions
    3. 6.3  ESD Ratings
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Information
    6. 6.6  Electrical Characteristics
    7. 6.7  Timing Requirements
    8. 6.8  Switching Characteristics
    9. 6.9  System Mounting Interface Loads
    10. 6.10 Physical Characteristics of the Micromirror Array
    11. 6.11 Micromirror Array Optical Characteristics
    12. 6.12 Window Characteristics
    13. 6.13 Chipset Component Usage Specification
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Micromirror Array
      2. 7.3.2 Double Data Rate (DDR) Interface
      3. 7.3.3 Micromirror Switching Control
      4. 7.3.4 DMD Voltage Supplies
      5. 7.3.5 Logic Reset
      6. 7.3.6 Temperature Sensing Diode
        1. 7.3.6.1 Temperature Sense Diode Theory
      7. 7.3.7 DMD JTAG Interface
    4. 7.4 System Optical Considerations
      1. 7.4.1 Numerical Aperture and Stray Light Control
      2. 7.4.2 Pupil Match
      3. 7.4.3 Illumination Overfill and Alignment
    5. 7.5 DMD Image Performance Specification
    6. 7.6 Micromirror Array Temperature Calculation
    7. 7.7 Micromirror Landed-On/Landed-Off Duty Cycle
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
    3. 8.3 Application Mission Profile Consideration
  9. 9 Power Supply Recommendations
    1. 9.1 Power Supply Sequencing Requirements
      1. 9.1.1 Power Up and Power Down
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Temperature Diode Pins
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
      2. 11.1.2 Device Markings
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 接收文档更新通知
    4. 11.4 支持资源
    5. 11.5 Trademarks
    6. 11.6 静电放电警告
    7. 11.7 Device Handling
    8. 11.8 术语表
  12. 12Mechanical, Packaging, and Orderable Information

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6.4 Recommended Operating Conditions

Over operating free-air temperature range (unless otherwise noted)
MINNOMMAXUNIT
SUPPLY VOLTAGE RANGE
VREFLVCMOS interface power supply voltage1.651.81.95V
VCCLVCMOS logic power supply voltage2.252.52.75V
VOFFSETMirror electrode and HVCMOS voltage8.258.58.75V
VBIASMirror electrode voltage15.51616.5V
|VBIAS – VOFFSET|Supply voltage delta(2)8.75V
VRESETMirror electrode voltage–9.5–10–10.5V
VP VT+Positive going threshold voltage0.4 × VREF0.7 × VREFV
VN VT–Negative going threshold voltage 0.3 × VREF0.6 × VREFV
VH ∆VTHysteresis voltage (Vp – Vn)0.1 × VREF0.4 × VREFV
IOH_TDOHigh level output current @ Voh = 2.25 V, TDO, Vcc = 2.25 V–2mA
IOL_TDOLow level output current @ Vol = 0.4 V, TDO, Vcc = 2.25 V2mA
TEMPERATURE DIODE
ITEMP_DIODEMax current source into temperature diode(4)120µA
ENVIRONMENTAL
TARRAY(5)Operating DMD array temperature - steady state(1)–40105°C
ILLUV(3)Illumination, wavelength < 395 nm2.0mW/cm2
ILLOVERFILLIllumination overfill maximum heat load in area shown in Figure 6-1(6)TARRAY ≤ 75°C26mW/mm2
ILLOVERFILLIllumination overfill maximum heat load in area shown in Figure 6-1(6)TARRAY > 75°C20
(1) DMD active array temperature can be calculated as shown in Section 7.6 section and assumes uniform illumination across the array.
(2) To prevent excess current, the supply voltage delta |VBIAS – VOFFSET| must be less than or equal to 8.75 V.
(3) The maximum operation conditions for DMD array temperature and illumination UV shall not be implemented simultaneously.
(4) Temperature diode is to assist in the calculation of the DMD array temperature during operation.
(5) Operating profile information for device micromirror landed duty-cycle and temperature may be provided if requested.
(6) The active area of the DLP3021-Q1 device is surrounded by an aperture on the inside of the DMD window surface that masks structures of the DMD device assembly from normal view. The aperture is sized to anticipate several optical conditions. Overfill light illuminating the area outside the active array can scatter and create adverse effects to the performance of an end application using the DMD. The illumination optical system should be designed to minimize light flux incident outside the active array. Depending on the particular system's optical architecture and assembly tolerances, the amount of overfill light on the outside of the active array may cause system performance degradation. Overfill illumination in excess of this specification may also impact thermal performance.
GUID-7DE6C98F-6498-4EE7-854D-7B9918987383-low.gifFigure 6-1 Illumination Overfill Diagram