ZHCSKG5C October 2019 – April 2024 CC2652P
PRODUCTION DATA
请参考 PDF 数据表获取器件具体的封装图。
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| Input voltage range | 0 | VDDS | V | ||
| Clock frequency | SCLK_LF | ||||
| Internal reference voltage(1) | Using internal DAC with VDDS as reference voltage, DAC code = 0 - 255 | 0.024 - 2.865 | V | ||
| Offset | Measured at VDDS / 2, includes error from internal DAC | ±5 | mV | ||
| Decision time | Step from –50mV to 50mV | 1 | Clock Cycle |