ZHCSFX3A April   2016  – November 2016 CC2564C

PRODUCTION DATA.  

  1. 1器件概述
    1. 1.1 特性
    2. 1.2 应用
    3. 1.3 说明
    4. 1.4 功能框图
  2. 2修订历史记录
  3. 3Device Comparison
    1. 3.1 Related Products
  4. 4Terminal Configuration and Functions
    1. 4.1 VQFN-MR Pin Diagram
      1. 4.1.1 Pin Attributes (VQFN-MR Package)
      2. 4.1.2 Connections for Unused Signals (VQFN-MR Package)
  5. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Power-On Hours
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Power Consumption Summary
      1. 5.5.1 Static Current Consumption
      2. 5.5.2 Dynamic Current Consumption
        1. 5.5.2.1 Current Consumption for Different Bluetooth BR and EDR Scenarios
        2. 5.5.2.2 Current Consumption for Different Low-Energy Scenarios
    6. 5.6 Electrical Characteristics
    7. 5.7 Thermal Resistance Characteristics for VQFN-MR (RVM) Package
    8. 5.8 Timing and Switching Characteristics
      1. 5.8.1 Device Power Supply
        1. 5.8.1.1 Power Sources
        2. 5.8.1.2 Device Power-Up and Power-Down Sequencing
        3. 5.8.1.3 Power Supplies and Shutdown—Static States
        4. 5.8.1.4 I/O States in Various Power Modes
        5. 5.8.1.5 nSHUTD Requirements
      2. 5.8.2 Clock Specifications
        1. 5.8.2.1 Slow Clock Requirements
        2. 5.8.2.2 External Fast Clock Crystal Requirements and Operation
        3. 5.8.2.3 Fast Clock Source Requirements (-40°C to +85°C)
      3. 5.8.3 Peripherals
        1. 5.8.3.1 UART
        2. 5.8.3.2 PCM
      4. 5.8.4 RF Performance
        1. 5.8.4.1 Bluetooth BR and EDR RF Performance
          1. 5.8.4.1.1 Bluetooth Receiver—In-Band Signals
          2. 5.8.4.1.2 Bluetooth Receiver—General Blocking
          3. 5.8.4.1.3 Bluetooth Transmitter—GFSK
          4. 5.8.4.1.4 Bluetooth Transmitter—EDR
          5. 5.8.4.1.5 Bluetooth Modulation—GFSK
          6. 5.8.4.1.6 Bluetooth Modulation—EDR
          7. 5.8.4.1.7 Bluetooth Transmitter—Out-of-Band and Spurious Emissions
        2. 5.8.4.2 Bluetooth low energy RF Performance
          1. 5.8.4.2.1 Bluetooth low energy Receiver—In-Band Signals
          2. 5.8.4.2.2 Bluetooth low energy Receiver—General Blocking
          3. 5.8.4.2.3 Bluetooth low energy Transmitter
          4. 5.8.4.2.4 Bluetooth low energy Modulation
          5. 5.8.4.2.5 Bluetooth low energy Transceiver, Out-Of-Band and Spurious Emissions
  6. 6Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Clock Inputs
      1. 6.3.1 Slow Clock
      2. 6.3.2 Fast Clock Using External Clock Source
        1. 6.3.2.1 External FREF DC-Coupled
        2. 6.3.2.2 External FREF Sine Wave, AC-Coupled
        3. 6.3.2.3 Fast Clock Using External Crystal
    4. 6.4 Functional Blocks
      1. 6.4.1 RF
        1. 6.4.1.1 Receiver
        2. 6.4.1.2 Transmitter
      2. 6.4.2 Host Controller Interface
        1. 6.4.2.1 4-Wire UART Interface—H4 Protocol
        2. 6.4.2.2 3-Wire UART Interface—H5 Protocol
      3. 6.4.3 Digital Codec Interface
        1. 6.4.3.1 Hardware Interface
        2. 6.4.3.2 I2S
        3. 6.4.3.3 Data Format
        4. 6.4.3.4 Frame-Idle Period
        5. 6.4.3.5 Clock-Edge Operation
        6. 6.4.3.6 Two-Channel Bus Example
      4. 6.4.4 Assisted Modes
        1. 6.4.4.1 Assisted HFP 1.6 (WBS)
        2. 6.4.4.2 Assisted A2DP
          1. 6.4.4.2.1 Assisted A2DP Sink
          2. 6.4.4.2.2 Assisted A2DP Source
    5. 6.5 Bluetooth BR and EDR Features
    6. 6.6 Bluetooth low energy Description
    7. 6.7 Bluetooth Transport Layers
    8. 6.8 Changes from the CC2564B Device to the CC2564C Device
  7. 7Applications, Implementation, and Layout
    1. 7.1 Reference Design Schematics and BOM for Power and Radio Connections
    2. 7.2 PCB Layout Guidelines
      1. 7.2.1 General PCB Guidelines
      2. 7.2.2 Power Supply Guidelines
      3. 7.2.3 User Interfaces
      4. 7.2.4 Clock Interfaces
      5. 7.2.5 RF Interface
  8. 8器件和文档支持
    1. 8.1 Third-Party Products Disclaimer
    2. 8.2 工具与软件
    3. 8.3 器件命名规则
    4. 8.4 Community Resources
    5. 8.5 商标
    6. 8.6 静电放电警告
    7. 8.7 Glossary
  9. 9机械、封装和可订购信息

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • RVM|76
散热焊盘机械数据 (封装 | 引脚)
订购信息

4 Terminal Configuration and Functions

4.1 VQFN-MR Pin Diagram

Figure 4-1 shows the bottom view of the pin diagram (VQFN-MR package).

CC2564C SWRS121-002.gif Figure 4-1 VQFN-MR Package Pin Diagram
Bottom View

4.1.1 Pin Attributes (VQFN-MR Package)

Table 4-1 describes the pin attributes for the VQFN-MR package.

SPACER

Table 4-1 Pin Attributes (VQFN-MR Package)

NAME NO. PULL AT RESET DEF. DIR.(1) I/O
Type(2)		 DESCRIPTION
I/O Signals
AUD_CLK B32 PD I/O HY, 4 mA PCM clock Fail-safe
AUD_FSYNC A35 PD I/O 4 mA PCM frame-sync signal Fail-safe
AUD_IN B34 PD I 4 mA PCM data input Fail-safe
AUD_OUT B33 PD O 4 mA PCM data output Fail-safe
HCI_CTS A29 PU I 8 mA HCI UART clear-to-send
The device is allowed to send data when HCI_CTS is low.
HCI_RX A26 PU I 8 mA HCI universal asynchronous receiver/transmitter (UART) data receive
HCI_RTS A32 PU O 8 mA HCI UART request-to-send
The host is allowed to send data when HCI_RTS is low.
HCI_TX A33 PU O 8 mA HCI UART data transmit
TX_DBG B24 PU O 2 mA TI internal debug messages. TI recommends leaving an internal test point.
Clock Signals
SLOW_CLK A25 I 32.768-kHz clock in Fail-safe
XTALP/FREFP B4 I Fast clock in analog (sine wave)
Output terminal of fast-clock crystal		 Fail-safe
XTALM/FREFM A4 I Fast clock in digital (square wave)
Input terminal of fast-clock crystal		 Fail-safe
Analog Signals
BT_RF B8 I/O Bluetooth RF I/O
nSHUTD A6 PD I Shutdown input (active low)
Power and Ground Signals
ADC_PPA_LDO_OUT A8 O ADC/PPA LDO output
CL1.5_LDO_IN B6 I Power amplifier (PA) LDO input
Connect directly to battery
CL1.5_LDO_OUT A7 O PA LDO output
DCO_LDO_OUT A12 O DCO LDO output
DIG_LDO_OUT A2, A3, B15, B26, B27, B35, B36 O Digital LDO output
QFN pin B26 or B27 must be shorted to other DIG_LDO_OUT pins on the PCB.
MLDO_IN B5 I Main LDO input
Connect directly to battery
MLDO_OUT A5, A9, B2, B7 I/O Main LDO output (1.8-V nominal)
SRAM_LDO_OUT B1 O SRAM LDO output
VDD_IO A17, A34, A38, B18, B19, B21, B22, B25 I I/O power supply (1.8-V nominal)
VSS A24, A28 I Ground
VSS_DCO B11 I DCO ground
VSS_FREF B3 I Fast clock ground
(1) I = input; O = output; I/O = bidirectional
(2) I/O Type: Digital I/O cells. HY = input hysteresis, current = typical output current

4.1.2 Connections for Unused Signals (VQFN-MR Package)

Section 4.1.2 lists the connections for unused signals for the VQFN-MR package.

SPACER

FUNCTION PIN NUMBER DESCRIPTION
NC A1 Not connected
NC A10 Not connected
NC A11 Not connected
NC A14 Not connected
NC A18 Not connected
NC A19 Not connected
NC A20 Not connected
NC A21 Not connected
NC A22 Not connected
NC A23 Not connected
NC A27 Not connected
NC A30 Not connected
NC A31 Not connected
NC A40 Not connected
NC B9 Not connected
NC B10 Not connected
NC B16 Not connected
NC B17 Not connected
NC B20 Not connected
NC B23 Not connected
NC A13 TI internal use
NC A15 TI internal use
NC A16 TI internal use
NC A36 TI internal use
NC A37 TI internal use
NC A39 TI internal use
NC B12 TI internal use
NC B13 TI internal use
NC B14 TI internal use
NC B29 TI internal use
NC B30 TI internal use
NC B31 TI internal use
NC B28 TI internal use