ZHCSCF9 May   2014 BUF16821-Q1

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用范围
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Two-Wire Bus Overview
      2. 7.3.2 Data Rates
      3. 7.3.3 General-Call Reset and Power-Up
      4. 7.3.4 Output Voltage
      5. 7.3.5 Updating the DAC Output Voltages
      6. 7.3.6 DIE_ID and DIE_REV Registers
      7. 7.3.7 Read and Write Operations
        1. 7.3.7.1 Read and Write: DAC and VCOM Register (Volatile Memory)
        2. 7.3.7.2 Writing: DAC and VCOM Register (Volatile Memory)
        3. 7.3.7.3 Reading: DAC, VCOM, Other Register (Volatile Memory)
        4. 7.3.7.4 Write: Nonvolatile Memory for the DAC Register
        5. 7.3.7.5 Read: Nonvolatile Memory for the DAC Register
      8. 7.3.8 Output Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 End-User Selected Gamma Control
      2. 7.4.2 Dynamic Gamma Control
    5. 7.5 Programming
      1. 7.5.1 Addressing the Device
      2. 7.5.2 Nonvolatile Memory
        1. 7.5.2.1 BKSEL Pin
        2. 7.5.2.2 General Acquire Command
        3. 7.5.2.3 Single-Channel Acquire Command
        4. 7.5.2.4 MaxBank
        5. 7.5.2.5 Parity Error Correction
    6. 7.6 Register Maps
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 General PowerPAD Design Considerations
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档　
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12机械封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VS Supply voltage 22 V
DVDD Digital power supply (VSD pin) 6 V
Digital input pins SCL, SDA, AO, BKSEL: voltage –0.5 6 V
SCL, SDA, AO, BKSEL: current ±10 mA
Output pins, OUT1 through OUT16, VCOM1 and VCOM2(2) (V–) – 0.5 (V+) + 0.5 V
Output short-circuit(3) Continuous
Ambient operating temperature –40 95 °C
TJ Junction temperature 125 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) See the Output Protection section.
(3) Short-circuit to ground, one amplifier per package.

6.2 Handling Ratings

MIN MAX UNIT
Tstg Storage temperature range –65 150 °C
V(ESD) Electrostatic discharge Human body model (HBM), per AEC Q100-002(1) –2000 2000 V
Charged device model (CDM), per AEC Q100-011 Corner pins (1, 14, 15, and 28) –750 750
Other pins –500 500
(1) AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VS Supply voltage 9.0 18.0 20.0 V
DVDD Digital power supply (VSD pin) 2.0 3.3 5.5 V

6.4 Thermal Information

THERMAL METRIC(1) BUF16821-Q1 UNIT
PWP (HTSSOP)
28 PINS
RθJA Junction-to-ambient thermal resistance 34.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 19.9
RθJB Junction-to-board thermal resistance 17.4
ψJT Junction-to-top characterization parameter 0.7
ψJB Junction-to-board characterization parameter 17.2
RθJC(bot) Junction-to-case (bottom) thermal resistance 3.0
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

At TA = 25°C, VS = 18 V, VSD = 2 V, RL = 1.5 kΩ connected to ground, and CL = 200 pF, unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNIT
ANALOG GAMMA BUFFER CHANNELS
Reset value Code 512 9 V
OUT 1–16 output swing: high Code = 1023, sourcing 10 mA, TA = –40°C to 85°C 17.7 17.85 V
OUT 1–16 output swing: low Code = 0, sinking 10 mA, TA = –40°C to 85°C 0.07 0.3 V
VCOM1, 2 output swing: high Code = 1023, sourcing 100 mA, TA = –40°C to 85°C 13 16.2 V
VCOM1, 2 output swing: low Code = 0, sinking 100 mA, TA = –40°C to 85°C 0.6 2 V
Continuous output current(1) 30 mA
Output accuracy ±20 ±50 mV
Output accuracy over temperature Code 512, TA = –40°C to 85°C ±25 μV/°C
INL Integral nonlinearity 0.3 LSB
DNL Differential nonlinearity 0.3 LSB
ΔVO(ΔIO) Load regulation, 10 mA Code 512 or VCC / 2, IOUT = 5-mA to –5-mA step 0.5 1.5 mV/mA
OTP MEMORY
Number of OTP write cycles 16 Cycles
Memory retention 100 Years
ANALOG POWER SUPPLY
Operating range 9 20 V
ICC(tot) Total analog supply current Outputs at reset values, no load 12 14 mA
ICC(tot) over temperature TA = –40°C to 85°C 18 mA
DIGITAL
VIH Logic 1 high input voltage 0.7 × VSD V
VIL Logic 0 low input voltage 0.3 × VSD V
VOL Logic 0 low output voltage ISINK = 3 mA 0.15 0.4 V
Input leakage ±0.01 ±10 μA
fCLK Clock frequency Standard, fast mode, TA = –40°C to 85°C 400 kHz
High-speed mode, TA = –40°C to 85°C 2.7 MHz
DIGITAL POWER SUPPLY
DVDD Digital power supply (VSD pin) 2.0 5.5 V
ISD Digital supply current(1) Outputs at reset values, no load, two-wire bus inactive 115 150 μA
ISD over temperature TA = –40°C to 85°C 115 μA
TEMPERATURE RANGE
Specified range –40 85 °C
Operating range Junction temperature < 125°C –40 95 °C
Storage range –65 150 °C
RθJA Thermal resistance,
HTSSOP-28(1)(2)		 40 °C/W
(1) Observe maximum power dissipation.
(2) Thermal pad is attached to the printed circuit board (PCB), 0-lfm airflow, and 76-mm × 76-mm copper area.

6.6 Timing Requirements

PARAMETER FAST MODE HIGH-SPEED MODE UNIT
MIN MAX MIN MAX
f(SCL) SCL operating frequency 0.001 0.4 0.001 2.7 MHz
t(BUF) Bus free time between stop and start conditions 1300 230 ns
t(HDSTA) Hold time after repeated start condition. After this period, the first clock is generated. 600 230 ns
t(SUSTA) Repeated start condition setup time 600 230 ns
t(SUSTO) Stop condition setup time 600 230 ns
t(HDDAT) Data hold time 20 900 20 130 ns
t(SUDAT) Data setup time 100 20 ns
t(LOW) SCL clock low period 1300 230 ns
t(HIGH) SCL clock high period 600 60 ns
tR(SDA), tF(SDA) Data rise and fall time 300 80 ns
tR(SCL), tF(SCL) Clock rise and fall time 300 40 ns
tR Clock and data rise time for SCLK ≤ 100 kHz 1000 ns
ai_two_wire_tim_bos397.gifFigure 1. Timing Requirements Diagram

6.7 Typical Characteristics

At TA = 25°C, VS = 18 V, VSD = 2 V, RL = 1.5 kΩ connected to ground, and CL = 200 pF, unless otherwise noted.
tc_vo-io_vcom1-2_bos712.gif
Figure 2. Output Voltage vs Output Current
(VCOM1 and VCOM2)
tc_dvdd-tmp_bos712.gif
Figure 4. Digital Supply Current vs Temperature
tc_vo-tmp_bos712.gif
10 Typical Units Shown
Figure 6. Output Voltage vs Temperature
tc_inl_bos712.gif
Figure 8. Integral Linearity Error
tc_step_resp_lg_bos712.gif
Figure 10. Large-Signal Step Response
tc_vo-io_ch1-22_bos712.gif
Figure 3. Output Voltage vs Output Current
(Channels 1–16)
tc_avdd-tmp_bos712.gif
Figure 5. Analog Supply Current vs Temperature
tc_dnl_bos712.gif
Figure 7. Differential Linearity Error
tc_bksel_switch_bos712.gif
Figure 9. BKSEL Switching Time Delay