ZHCSEE1F October   2010  – September 2019 ADS1118

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      K 型热电偶测量使用集成温度传感器进行冷结点补偿
  4. 4 修订历史记录
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements: Serial Interface
    7. 7.7 Switching Characteristics: Serial Interface
    8. 7.8 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Noise Performance
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Multiplexer
      2. 9.3.2 Analog Inputs
      3. 9.3.3 Full-Scale Range (FSR) and LSB Size
      4. 9.3.4 Voltage Reference
      5. 9.3.5 Oscillator
      6. 9.3.6 Temperature Sensor
        1. 9.3.6.1 Converting from Temperature to Digital Codes
        2. 9.3.6.2 Converting from Digital Codes to Temperature
    4. 9.4 Device Functional Modes
      1. 9.4.1 Reset and Power Up
      2. 9.4.2 Operating Modes
        1. 9.4.2.1 Single-Shot Mode and Power-Down
        2. 9.4.2.2 Continuous-Conversion Mode
      3. 9.4.3 Duty Cycling for Low Power
    5. 9.5 Programming
      1. 9.5.1 Serial Interface
      2. 9.5.2 Chip Select (CS)
      3. 9.5.3 Serial Clock (SCLK)
      4. 9.5.4 Data Input (DIN)
      5. 9.5.5 Data Output and Data Ready (DOUT/DRDY)
      6. 9.5.6 Data Format
      7. 9.5.7 Data Retrieval
        1. 9.5.7.1 32-Bit Data Transmission Cycle
        2. 9.5.7.2 16-Bit Data Transmission Cycle
    6. 9.6 Register Maps
      1. 9.6.1 Conversion Register [reset = 0000h]
        1. Table 6. Conversion Register Field Descriptions
      2. 9.6.2 Config Register [reset = 058Bh]
        1. Table 7. Config Register Field Descriptions
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Serial Interface Connections
      2. 10.1.2 GPIO Ports for Communication
      3. 10.1.3 Analog Input Filtering
      4. 10.1.4 Single-Ended Inputs
      5. 10.1.5 Connecting Multiple Devices
      6. 10.1.6 Pseudo Code Example
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
    1. 11.1 Power-Supply Sequencing
    2. 11.2 Power-Supply Decoupling
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13器件和文档支持
    1. 13.1 文档支持
      1. 13.1.1 相关文档
    2. 13.2 接收文档更新通知
    3. 13.3 社区资源
    4. 13.4 商标
    5. 13.5 静电放电警告
    6. 13.6 Glossary
  14. 14机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.5 Electrical Characteristics

Maximum and minimum specifications apply from TA = –40°C to +125°C. Typical specifications are at TA = 25°C.
All specifications are at VDD = 3.3 V, data rate = 8 SPS, and full-scale range (FSR) = ±2.048 V (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ANALOG INPUTS
Common-mode input impedance FSR = ±6.144 V(1) 8 MΩ
FSR = ±4.096 V(1), FSR = ±2.048 V 6
FSR = ±1.024 V 3
FSR = ±0.512 V, FSR = ±0.256 V 100
Differential input impedance FSR = ±6.144 V(1) 22 MΩ
FSR = ±4.096 V(1) 15
FSR = ±2.048 V 4.9
FSR = ±1.024 V 2.4
FSR = ±0.512 V, FSR = ±0.256 V 710 kΩ
SYSTEM PERFORMANCE
Resolution (No missing codes) 16 Bits
DR Data rate 8, 16, 32, 64, 128, 250, 475, 860 SPS
Data rate variation All data rates –10% 10%
Output noise See Noise Performance section
INL Integral nonlinearity DR = 8 SPS, FSR = ±2.048 V(1) 1 LSB
Offset error FSR = ±2.048 V, differential inputs ±0.1 ±2 LSB
FSR = ±2.048 V, single-ended inputs ±0.25
Offset drift FSR = ±2.048 V 0.002 LSB/°C
Offset power-supply rejection FSR = ±2.048 V, DC supply variation 0.2 LSB/V
Offset channel match Match between any two inputs 0.6 LSB
Gain error(2) FSR = ±2.048 V, TA = 25°C 0.01% 0.15%
Gain drift(2)(3) FSR = ±0.256 V 7 ppm/°C
FSR = ±2.048 V 5 40
FSR = ±6.144 V(1) 5
Gain power-supply rejection 10 ppm/V
Gain match(2) Match between any two gains 0.01% 0.1%
Gain channel match Match between any two inputs 0.01% 0.1%
CMRR Common-mode rejection ratio At DC, FSR = ±0.256 V 105 dB
At DC, FSR = ±2.048 V 100
At DC, FSR = ±6.144 V(1) 90
fCM = 50 Hz, DR = 860 SPS 105
fCM = 60 Hz, DR = 860 SPS 105
TEMPERATURE SENSOR
Temperature range –40 125 °C
Temperature resolution 0.03125 °C/LSB
Accuracy TA = 0°C to 70°C 0.2 ±0.5 °C
TA = –40°C to +125°C 0.4 ±1
vs supply 0.03125 ±0.25 °C/V
DIGITAL INPUTS/OUTPUTS
VIH High-level input voltage 0.7 VDD VDD V
VIL Low-level input voltage GND 0.2 VDD V
VOH High-level output voltage IOH = 1 mA 0.8 VDD V
VOL Low-level output voltage IOL = 1 mA GND 0.2 VDD V
IH Input leakage, high VIH = 5.5 V –10 10 μA
IL Input leakage, low VIL = GND –10 10 μA
POWER SUPPLY
IVDD Supply current Power down, TA = 25°C 0.5 2 μA
Power down 5
Operating, TA = 25°C 150 200
Operating 300
PD Power dissipation VDD = 5 V 0.9 mW
VDD = 3.3 V 0.5
VDD = 2 V 0.3
(1) Best-fit INL; covers 99% of full-scale.
(2) Includes all errors from onboard PGA and voltage reference.
(3) Maximum value specified by characterization.