ZHCSE76E December   2011  – December 2022 ADS1113-Q1 , ADS1114-Q1 , ADS1115-Q1

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
    1.     Device Comparison Table
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements: I2C
    7. 6.7 Timing Diagram
    8. 6.8 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Noise Performance
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Multiplexer
      2. 8.3.2 Analog Inputs
      3. 8.3.3 Full-Scale Range (FSR) and LSB Size
      4. 8.3.4 Voltage Reference
      5. 8.3.5 Oscillator
      6. 8.3.6 Output Data Rate and Conversion Time
      7. 8.3.7 Digital Comparator (ADS1114-Q1 and ADS1115-Q1 Only)
      8. 8.3.8 Conversion Ready Pin (ADS1114-Q1 and ADS1115-Q1 Only)
      9. 8.3.9 SMbus 警报响应
    4. 8.4 Device Functional Modes
      1. 8.4.1 Reset and Power-Up
      2. 8.4.2 Operating Modes
        1. 8.4.2.1 Single-Shot Mode
        2. 8.4.2.2 Continuous-Conversion Mode
      3. 8.4.3 Duty Cycling For Low Power
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
        1. 8.5.1.1 I2C Address Selection
        2. 8.5.1.2 I2C General Call
        3. 8.5.1.3 I2C Speed Modes
      2. 8.5.2 Target Mode Operations
        1. 8.5.2.1 Receive Mode
        2. 8.5.2.2 Transmit Mode
      3. 8.5.3 Writing To and Reading From the Registers
      4. 8.5.4 Data Format
    6. 8.6 Register Map
      1. 8.6.1 Address Pointer Register (address = N/A) [reset = N/A]
      2. 8.6.2 Conversion Register (P[1:0] = 00b) [reset = 0000h]
      3. 8.6.3 Config Register (P[1:0] = 01b) [reset = 8583h]
      4. 8.6.4 Lo_thresh (P[1:0] = 10b) [reset = 8000h] and Hi_thresh (P[1:0] = 11b) [reset = 7FFFh] Registers
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Basic Connections
      2. 9.1.2 Single-Ended Inputs
      3. 9.1.3 Input Protection
      4. 9.1.4 Unused Inputs and Outputs
      5. 9.1.5 Analog Input Filtering
      6. 9.1.6 Connecting Multiple Devices
      7. 9.1.7 Quick-Start Guide
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Shunt Resistor Considerations
        2. 9.2.2.2 Operational Amplifier Considerations
        3. 9.2.2.3 ADC Input Common-Mode Considerations
        4. 9.2.2.4 Resistor (R1, R2, R3, R4) Considerations
        5. 9.2.2.5 Noise and Input Impedance Considerations
        6. 9.2.2.6 First-Order RC Filter Considerations
        7. 9.2.2.7 Circuit Implementation
        8. 9.2.2.8 Results Summary
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Power-Supply Sequencing
      2. 9.3.2 Power-Supply Decoupling
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 接收文档更新通知
    3. 10.3 支持资源
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 术语表
  11. 11Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Typical Characteristics

at TA = 25°C, VDD = 3.3 V, FSR = ±2.048 V, DR = 8 SPS (unless otherwise noted)

GUID-E68ACEB0-6C50-4A77-991B-688AE39698C5-low.gif
 
Figure 6-2 Operating Current vs Temperature
GUID-05A6108E-0BC0-49A2-8A0D-2A2F5234A1D1-low.gif
 
Figure 6-4 Single-Ended Offset Error vs Temperature
GUID-AC96800E-0137-4C5D-B85F-3277E211D5D6-low.gif
 
Figure 6-6 Gain Error vs Temperature
GUID-D2E741A6-0633-415A-A74F-4073905CBD1B-low.gif
 
Figure 6-8 INL vs Supply Voltage
GUID-325828E1-5B17-44DA-AA1F-9707829BC8EC-low.gif
VDD = 3.3 V, FSR = ±0.512 V, DR = 8 SPS, best fit
Figure 6-10 INL vs Input Signal
GUID-FEBC6AD0-D1FE-41EA-9E91-24C9BBFBC4D8-low.gif
VDD = 5 V, FSR = ±0.512 V, DR = 8 SPS, best fit
Figure 6-12 INL vs Input Signal
GUID-5A86FB6E-CC1B-4D8C-8900-6F00153D6BD8-low.gif
FSR = ±0.512 V
Figure 6-14 Noise vs Input Signal
GUID-E3846F62-A702-48AC-B3A1-4D756BAED779-low.gif
FSR = ±2.048 V, DR = 8 SPS
 
Figure 6-16 Noise vs Temperature
GUID-2F7CAF75-ACF3-4B8F-A4A2-6588F9905F56-low.gif
FSR = ±2.048 V, 185 units
Figure 6-18 Offset Histogram
GUID-24BEFB57-CC9C-4EFD-9865-23B94B64E1E8-low.gif
 
Figure 6-20 Data Rate vs Temperature
GUID-1E770AF2-A591-41CE-BC05-E1D58E3ACA11-low.gif
 
Figure 6-3 Power-Down Current vs Temperature
GUID-8065B7E5-F205-4F4E-A809-3D578815449E-low.gif
 
Figure 6-5 Differential Offset vs Temperature
GUID-09A6D2E3-B635-4B18-A12E-D1171D50FE9B-low.gif
 
Figure 6-7 Gain Error vs Supply Voltage
GUID-034E49AC-8182-4877-A46F-1037EC63D3ED-low.gif
VDD = 3.3 V, FSR = ±2.048 V, DR = 8 SPS, best fit
Figure 6-9 INL vs Input Signal
GUID-0E362572-8980-486F-8E0C-8D935EC12A69-low.gif
VDD = 5 V, FSR = ±2.048 V, DR = 8 SPS, best fit
Figure 6-11 INL vs Input Signal
GUID-FAAB1617-7DA5-4A1B-874E-A71BF41BFC4C-low.gif
 
Figure 6-13 INL vs Temperature
GUID-C888CCD3-A154-4807-945D-531D61367891-low.gif
FSR = ±2.048 V
Figure 6-15 Noise vs Supply Voltage
GUID-6E29CBF3-076B-485B-AEA6-6F066F3050AE-low.gif
FSR = ±2.048 V, 185 units
Figure 6-17 Gain Error Histogram
Differential inputs; includes noise, offset and gain error
Figure 6-19 Total Error vs Input Signal
GUID-944C1706-872B-43C3-A724-51F7CD17B184-low.gif
DR = 8 SPS
Figure 6-21 Digital Filter Frequency Response