TIDUES0E June   2019  – April 2024 TMS320F28P550SJ , TMS320F28P559SJ-Q1

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1  UCC21710
      2. 2.2.2  UCC14141-Q1
      3. 2.2.3  AMC1311
      4. 2.2.4  AMC1302
      5. 2.2.5  OPA320
      6. 2.2.6  AMC1306M05
      7. 2.2.7  AMC1336
      8. 2.2.8  TMCS1133
      9. 2.2.9  TMS320F280039C
      10. 2.2.10 TLVM13620
      11. 2.2.11 ISOW1044
      12. 2.2.12 TPS2640
    3. 2.3 System Design Theory
      1. 2.3.1 Dual Active Bridge Analogy With Power Systems
      2. 2.3.2 Dual-Active Bridge – Switching Sequence
      3. 2.3.3 Dual-Active Bridge – Zero Voltage Switching (ZVS)
      4. 2.3.4 Dual-Active Bridge - Design Considerations
        1. 2.3.4.1 Leakage Inductor
        2. 2.3.4.2 Soft Switching Range
        3. 2.3.4.3 Effect of Inductance on Current
        4. 2.3.4.4 Phase Shift
        5. 2.3.4.5 Capacitor Selection
          1. 2.3.4.5.1 DC-Blocking Capacitors
        6. 2.3.4.6 Switching Frequency
        7. 2.3.4.7 Transformer Selection
        8. 2.3.4.8 SiC MOSFET Selection
      5. 2.3.5 Loss Analysis
        1. 2.3.5.1 SiC MOSFET and Diode Losses
        2. 2.3.5.2 Transformer Losses
        3. 2.3.5.3 Inductor Losses
        4. 2.3.5.4 Gate Driver Losses
        5. 2.3.5.5 Efficiency
        6. 2.3.5.6 Thermal Considerations
  9. 3Circuit Description
    1. 3.1 Power Stage
    2. 3.2 DC Voltage Sensing
      1. 3.2.1 Primary DC Voltage Sensing
      2. 3.2.2 Secondary DC Voltage Sensing
        1. 3.2.2.1 Secondary Side Battery Voltage Sensing
    3. 3.3 Current Sensing
    4. 3.4 Power Architecture
      1. 3.4.1 Auxiliary Power Supply
      2. 3.4.2 Gate Driver Bias Power Supply
      3. 3.4.3 Isolated Power Supply for Sense Circuits
    5. 3.5 Gate Driver Circuit
    6. 3.6 Additional Circuitry
    7. 3.7 Simulation
      1. 3.7.1 Setup
      2. 3.7.2 Running Simulations
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Required Hardware and Software
      1. 4.1.1 Hardware
      2. 4.1.2 Software
        1. 4.1.2.1 Getting Started With Software
        2. 4.1.2.2 Pin Configuration
        3. 4.1.2.3 PWM Configuration
        4. 4.1.2.4 High-Resolution Phase Shift Configuration
        5. 4.1.2.5 ADC Configuration
        6. 4.1.2.6 ISR Structure
    2. 4.2 Test Setup
    3. 4.3 PowerSUITE GUI
    4. 4.4 LABs
      1. 4.4.1 Lab 1
      2. 4.4.2 Lab 2
      3. 4.4.3 Lab 3
      4. 4.4.4 Lab 4
      5. 4.4.5 Lab 5
      6. 4.4.6 Lab 6
      7. 4.4.7 Lab 7
    5. 4.5 Test Results
      1. 4.5.1 Closed-Loop Performance
  11. 5Design Files
    1. 5.1 Schematics
    2. 5.2 Bill of Materials
    3. 5.3 Altium Project
    4. 5.4 Gerber Files
    5. 5.5 Assembly Drawings
  12. 6Related Documentation
    1. 6.1 Trademarks
  13. 7Terminology
  14. 8About the Author
  15. 9Revision History

Lab 4

  • Test Setup for Lab 4 (Closed Current Loop - Isec)

    Compile the project by selecting Lab 4: Closed Loop Current with Resistive Load in the drop-down menu of Project Options from PowerSUITE GUI. Make sure current and voltage limits are set per operating conditions.

    #if DAB_LAB == 4
    #define DAB_CONTROL_RUNNING_ON C28X_CORE
    #define DAB_POWER_FLOW DAB_POWER_FLOW_PRIM_SEC
    #define DAB_INCR_BUILD DAB_CLOSED_LOOP_BUILD
    #define DAB_TEST_SETUP DAB_TEST_SETUP_RES_LOAD
    #define DAB_PROTECTION DAB_PROTECTION_ENABLED
    #define DAB_CONTROL_MODE DAB_CURRENT_MODE
    #define DAB_SFRA_TYPE 1
    #define DAB_SFRA_AMPLITUDE (float32_t)DAB_SFRA_INJECTION_AMPLITUDE_LEVEL1
    #endif
    1. Run the project by clicking the green run button in CCS.
    2. Populate the required variables in the watch window by loading JavaScript setupdebugenv_lab4.js in the scripting console.
      TIDA-010054 Lab 4 Watch
                                    View Configuration Figure 4-37 Lab 4 Watch View Configuration
    3. Enable fans and relays by writing "1" into DAB_enableFan and DAB_enableRelay.
    4. Enable PWM by writing “1” to the DAB_clearTrip variable.
    5. In the watch view, check if the DAB_vPrimSensed_Volts, DAB_iPrimSensed_Amps, DAB_vSecSensed_Volts, and DAB_iSecSensed_Amps variables are updating periodically.
    6. Set the output current by writing to DAB_iSecRef_Amps (in this example 1Adc).
    7. Enable closed loop operation by writing “1” to the DAB_closeGiLoop variable. The controller automatically adjusts the phase shift depending upon the operating conditions to generate secondary output current to match with that of DAB_iSecRef_Amps.
      Note: In the software, the maximum phase shift is limited to 0.13 as a safety precaution. Please adjust the primary voltage to stay within the phase shift limits and still generate the required secondary current.
    8. Now, slowly increase the input VPRIM DC voltage and adjust DAB_iSecRef_Amps accordingly to reach to the required operating point.
      TIDA-010054 Lab 4 -
                                    Expression Window Closed Current Loop Figure 4-38 Lab 4 - Expression Window Closed Current Loop
      CAUTION: Make sure the secondary current is limited to a safe value depending upon the output load. High-impedance load can lead to dangerous secondary voltage which can destroy the board. Make sure secondary overvoltage protection is enabled and the threshold is set to a safe value.
      #define DAB_PROTECTION DAB_PROTECTION_ENABLED
      #define DAB_VSEC_TRIP_LIMIT ((float32_t)500)
      #define DAB_BOARD_PROTECTION_VSEC_OVERVOLTAGE 1
  • Frequency response of closed loop current
    1. Run the SFRA by clicking on the SFRA icon. The SFRA GUI opens.
    2. Select the options for the device on the SFRA GUI; for example, for F280039, select floating point. Click the Setup Connection button. In the pop-up window, uncheck the boot-on-connect option and select an appropriate COM port. Select the OK button. Return to the SFRA GUI and click Connect.
    3. The SFRA GUI connects to the device. A SFRA sweep can now be started by clicking Start Sweep. The complete SFRA sweep takes a few minutes to finish. Monitor the activity in the progress bar on the SFRA GUI or by checking the flashing blue LED on the back of the control card, which indicates UART activity.

      The plot in Figure 4-39 is captured with the PI compensator (gain of 0.5).

      TIDA-010054 Lab 4 SFRA
                                    Open Loop Plot for the Closed Current Loop
      Test condition: VIN= 800 V, VOUT = 500 V, IOUT = 10 A, SFRA amplitude = 0.002
      Figure 4-39 Lab 4 SFRA Open Loop Plot for the Closed Current Loop
      #define DAB_GI_KP (float32_t) 0.5
      #define DAB_GI_KI (float32_t) 0.0063030
      #define DAB_GI_UMAX (float32_t) 0.13
      #define DAB_GI_UMIN (float32_t) -0.13
      #define DAB_GI_IMAX (float32_t) 2.0
      #define DAB_GI_IMIN (float32_t) -2.0