SBOA386B March   2020  – October 2023 INA180-Q1 , INA181-Q1 , INA185-Q1 , INA2180-Q1 , INA2181-Q1 , INA4180-Q1 , INA4181-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 INA180-Q1, SOT-23-5 Package
    2. 2.2 INA2180-Q1, VSSOP-8 Package
    3. 2.3 INA4180-Q1, TSSOP-14 Package
    4. 2.4 INA181-Q1, SOT-23-6 Package
    5. 2.5 INA2181-Q1, VSSOP-10 Package
    6. 2.6 INA4181-Q1, TSSOP-20 Package
    7. 2.7 INA181-Q1 and INA185-Q1, DCK Package
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 INA180-Q1, SOT-23-5 Package (Pinout A)
    2. 4.2 INA180-Q1, SOT-23-5 Package (Pinout B)
    3. 4.3 INA2180-Q1, VSSOP-8 Package
    4. 4.4 INA4180-Q1, TSSOP-14 Package
    5. 4.5 INA181-Q1, SOT-23-6 Package
    6. 4.6 INA2181-Q1, VSSOP-10 Package
    7. 4.7 INA4181-Q1, TSSOP-20 Package
    8. 4.8 INA181-Q1 and INA185-Q1, DCK Package
  7. 5Revision History

INA2181-Q1, VSSOP-10 Package

INA2181-Q1 Pin Diagram (VSSOP-10 Package) shows the INA2181-Q1 pin diagram for the VSSOP-10 package. For a detailed description of the device pins please refer to the 'Pin Configuration and Functions' section in the INA2181-Q1 datasheet.


GUID-20200610-SS0I-H4T7-BVKF-DCL0C83GQJLT-low.png

Figure 4-6 INA2181-Q1 Pin Diagram (VSSOP-10 Package)
Table 4-22 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
OUT1 1 Output will be pulled down to GND and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating could cause die junction temperature to exceed 150°C. B
IN-1 2 In high-side configuration, a short from the bus supply to GND will occur (through RSHUNT). High current will flow from bus supply to GND. The shunt may be damaged. In low-side configuration, normal operation. B for high-side; D for low-side
IN+1 3 In high-side configuration, a short from the bus supply to GND will occur. B
GND 4 Normal operation. D
REF1 5 Normal operation if REF1 pin is at GND potential by design; otherwise the system measurement will be incorrect. D if REF1=GND by design; C otherwise
REF2 6 Normal operation if REF2 pin is at GND potential by design; otherwise the system measurement will be incorrect. D if REF2=GND by design; C otherwise
IN+2 7 In high-side configuration, a short from the bus supply to GND will occur. B
IN-2 8 In high-side configuration, a short from the bus supply to GND will occur (through RSHUNT). High current will flow from bus supply to GND. The shunt may be damaged. In low-side configuration, normal operation. B for high-side; D for low-side
OUT2 9 Output will be pulled down to GND and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating could cause die junction temperature to exceed 150°C. B
VS 10 Power supply shorted to GND. B
Table 4-23 Pin FMA for Device Pins Open-Circuited
Pin Name Pin No. Description of Potential Failure Effect(s) Failure Effect Class
OUT1 1 Output can be left open. There is no effect on the IC, but the output will not be measured. C
IN-1 2 Shunt resistor is not connected to amplifier. IN-1 pin may float to an unknown value. Output will go to an unknown value not to exceed VS or GND. B
IN+1 3 Shunt resistor is not connected to amplifier. IN+1 pin may float to an unknown value. Output will go to an unknown value not to exceed VS or GND. B
GND 4 When GND is floating, output will be incorrect as it is no longer referenced to GND. B
REF1 5 Output common-mode voltage is not defined. Output will not maintain a linear relationship with differential input voltage. B
REF2 6 Output common-mode voltage is not defined. Output will not maintain a linear relationship with differential input voltage. B
IN+2 7 Shunt resistor is not connected to amplifier. IN+2 pin may float to an unknown value. Output will go to an unknown value not to exceed VS or GND. B
IN-2 8 Shunt resistor is not connected to amplifier. IN-2 pin may float to an unknown value. Output will go to an unknown value not to exceed VS or GND. B
OUT2 9 Output can be left open. There is no effect on the IC, but the output will not be measured. C
VS 10 No power to device. Device may be biased through inputs. Output will be incorrect and close to GND. B
Table 4-24 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure Effect(s)Failure Effect Class
OUT1 1 2 - IN-1 In high-side configuration, a short from the bus voltage to the output stage will occur. The device may become damaged. In low-side configuration, output will be pulled down to GND and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating, could cause die junction temperature to exceed 150°C. A for high-side; B for low-side
IN-1 2 3 - IN+1 Inputs shorted together, so no sense voltage applied. Output will stay close to GND. B
IN+1 3 4 - GND In high-side configuration, a short from the bus supply to GND will occur. B
GND 4 5 - REF1 Normal operation if REF1 pin is at GND potential by design; otherwise the system measurement will be incorrect. D if REF1=GND by design; B otherwise
REF1 5 6 - REF2 Normal operation if REF1 and REF2 are at the same potential by design; otherwise the system measurement will be incorrect. D if REF1=REF2 by design; B otherwise
REF2 6 7 - IN+2 In high-side configuration, REF2 shorted to bus supply. In low-side configuration, REF2 shorted to GND through RSHUNT (normal operation if REF2 is at GND potential by design). A for high-side; B for low-side (D if REF2=GND by design)
IN+2 7 8 - IN-2 Inputs shorted together, so no sense voltage applied. Output will stay close to GND. B
IN-2 8 9 - OUT2 In high-side configuration, a short from the bus voltage to the output stage will occur. The device may become damaged. In low-side configuration, output will be pulled down to GND and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating, could cause die junction temperature to exceed 150°C. A for high-side; B for low-side
OUT2 9 10 - VS Output will be pulled to VS and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating could cause die junction temperature to exceed 150°C. B
VS 10 1 - OUT1 Output will be pulled to VS and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating could cause die junction temperature to exceed 150°C. B
Table 4-25 Pin FMA for Device Pins Short-Circuited to VS
Pin Name Pin No. Description of Potential Failure Effect(s) Failure Effect Class
OUT1 1 Output will be pulled to VS and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating could cause die junction temperature to exceed 150°C. B
IN-1 2 In high-side configuration, device power supply shorted to bus supply (through RSHUNT). In low-side configuration, device power supply shorted to GND. A for high-side; B for low-side
IN+1 3 In high-side configuration, device power supply shorted to bus supply. In low-side configuration, device power supply shorted to GND (through RSHUNT). A for high-side; B for low-side
GND 4 Power supply shorted to GND. B
REF1 5 Normal operation if REF1 pin is at VS potential by design; otherwise the system measurement will be incorrect. D if REF1=VS by design; B otherwise
REF2 6 Normal operation if REF2 pin is at VS potential by design; otherwise the system measurement will be incorrect. D if REF2=VS by design; B otherwise
IN+2 7 In high-side configuration, device power supply shorted to bus supply. In low-side configuration, device power supply shorted to GND (through RSHUNT). A for high-side; B for low-side
IN-2 8 In high-side configuration, device power supply shorted to bus supply (through RSHUNT). In low-side configuration, device power supply shorted to GND. A for high-side; B for low-side
OUT2 9 Output will be pulled to VS and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating could cause die junction temperature to exceed 150°C. B
VS 10 Normal operation. D