ZHCSIS2B september   2018  – december 2020 TPS7A11

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Excellent Transient Response
        1. 7.3.1.1 Global Undervoltage Lockout (UVLO)
      2. 7.3.2 Active Discharge
      3. 7.3.3 Enable Pin
      4. 7.3.4 Sequencing Requirement
      5. 7.3.5 Internal Foldback Current Limit
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Mode
      2. 7.4.2 Dropout Mode
      3. 7.4.3 Disable Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Recommended Capacitor Types
      2. 8.1.2 Input and Output Capacitor Requirements
      3. 8.1.3 Load Transient Response
      4. 8.1.4 Dropout Voltage
      5. 8.1.5 Behavior During Transition From Dropout Into Regulation
      6. 8.1.6 Undervoltage Lockout Circuit Operation
      7. 8.1.7 Power Dissipation (PD)
      8. 8.1.8 Estimating Junction Temperature
      9. 8.1.9 Recommended Area for Continuous Operation
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedures
      3. 8.2.3 Application Curve
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Module
      2. 11.1.2 Spice Model
      3. 11.1.3 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 接收文档更新通知
    4. 11.4 支持资源
    5. 11.5 Trademarks
    6. 11.6 静电放电警告
    7. 11.7 术语表
  13.   Mechanical, Packaging, and Orderable Information

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8.1.6 Undervoltage Lockout Circuit Operation

The VIN UVLO circuit makes sure that the device remains disabled before the input supply reaches the minimum operational voltage range. The VIN UVLO circuit also makes sure that the device shuts down when the input supply collapses. Similarly, the VBIAS UVLO circuit makes sure that the device stays disabled before the bias supply reaches the minimum operational voltage range. The VBIAS UVLO circuit also makes sure that the device shuts down when the bias supply collapses.

Figure 8-2 depicts the UVLO circuit response to various input or bias voltage events. The diagram can be separated into the following parts:

  • Region A: The device does not start until the input or bias voltage reaches the UVLO rising threshold
  • Region B: Normal operation, regulating device
  • Region C: Brownout event above the UVLO falling threshold (UVLO rising threshold – UVLO hystersis). The output may fall out of regulation but the device is still enabled.
  • Region D: Normal operation, regulating device
  • Region E: Brownout event below the UVLO falling threshold. The device is disabled in most cases and the output falls as a result of the load and active discharge circuit. The device is re-enabled when the UVLO rising threshold is reached and a normal start-up follows.
  • Region F: Normal operation followed by the input or bias falling to the UVLO falling threshold
  • Region G: The device is disabled when the input or bias voltages fall below the UVLO falling threshold to 0 V. The output falls as a result of the load and active discharge circuit.
GUID-E7F7EF7D-1E79-4DED-9F72-0451CEB3480E-low.gifFigure 8-2 Typical VIN or VBIAS UVLO Circuit Operation