ZHCSAI3E May   2012  – March 2017 TPS65131-Q1

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用范围
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power Conversion
      2. 8.3.2 Control
      3. 8.3.3 Output Rails Enable or Disable
      4. 8.3.4 Load Disconnect
      5. 8.3.5 Soft Start
      6. 8.3.6 Overvoltage Protection
      7. 8.3.7 Undervoltage Lockout
      8. 8.3.8 Overtemperature Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Save Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 TPS65131-Q1 With VPOS = 10.5 V, VNEG = -10 V
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Programming the Output Voltage
            1. 9.2.1.2.1.1 Boost Converter
            2. 9.2.1.2.1.2 Inverting Converter
          2. 9.2.1.2.2 Inductor Selection
          3. 9.2.1.2.3 Capacitor Selection
            1. 9.2.1.2.3.1 Input Capacitor
            2. 9.2.1.2.3.2 Output Capacitors
          4. 9.2.1.2.4 Rectifier Diode Selection
          5. 9.2.1.2.5 External P-MOSFET Selection
          6. 9.2.1.2.6 Stabilizing the Control Loop
            1. 9.2.1.2.6.1 Feedforward Capacitors
            2. 9.2.1.2.6.2 Compensation Capacitors
        3. 9.2.1.3 Analog Supply Input Filter
          1. 9.2.1.3.1 RC-Filter
          2. 9.2.1.3.2 LC-Filter
        4. 9.2.1.4 Thermal Information
        5. 9.2.1.5 Application Curves
      2. 9.2.2 TPS65131-Q1 With VPOS = 5.5 V, VNEG = -5 V
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Application Curves
      3. 9.2.3 TPS65131-Q1 With VPOS = 15 V, VNEG = -15 V
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 器件支持
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 商标
    3. 12.3 静电放电警告
    4. 12.4 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature, unless otherwise noted (1)
VALUE UNIT
MIN MAX
Input voltage range at pins VIN, INN (2) –0.3 6 V
Voltage at pin VPOS (2) –0.3 17 V
Voltage at pin VNEG (2) –17 V(VIN) + 0.3 V
Voltage at pins ENN, ENP, FBP, FBN, CN, CP, PSP, PSN, BSW (2) –0.3 V(VIN) + 0.3 V
Input voltage at pin INP (2) –0.3 17 V
Differential voltage between pins OUTN to INN (2) –0.3 24 V
Thermal pad(2) –0.3 0.3 V
TJ Operating junction temperature –40 150 °C
Tstg Storage temperature range –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to the network ground pin, unless otherwise noted.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per AEC Q100-002(1) ±1000 V
Charged device model (CDM), per AEC Q100-011 ±750 V
(1) AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

over operating free-air temperature, unless otherwise noted
MIN MAX UNIT
VI , V(VIN), V(INN) Application input voltage range, input voltage range at VIN and INN pins 2.7 5.5 V
VPOS Adjustable output voltage range for the boost converter VI + 0.5 15 V
VNEG Adjustable output voltage range for the inverting converter –15 –2 V
V(ENN), V(ENP) Enable signals voltage 0 5.5 V
V(PSN), V(PSP) Power-save mode enable signals voltage 0 5.5 V
TA Operating free-air temperature range(1) –40 105 °C
TJ Operating junction temperature range –40 125 °C
(1) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may require derating. See Thermal Information for details.

6.4 Thermal Information

THERMAL METRIC(1) TPS65131-Q1 UNIT
RGE PACKAGE
24 PINS
RθJA Junction-to-ambient thermal resistance 34.1 °C/W
RθJCtop Junction-to-case (top) thermal resistance 36.8 °C/W
RθJB Junction-to-board thermal resistance 12.2 °C/W
ψJT Junction-to-top characterization parameter 0.4 °C/W
ψJB Junction-to-board characterization parameter 12.3 °C/W
RθJCbot Junction-to-case (bottom) thermal resistance 2.8 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report (SPRA953).

6.5 Electrical Characteristics

This specification applies over the full recommended input voltage range VI = 2.7 V to 5.5 V and over the temperature range TJ = –40°C to 125°C unless otherwise noted. Typical values apply for VI = 3.6 V and TJ = 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DC-DC STAGE (V(VPOS), V(VNEG))
Vref Reference voltage Iref = 10 µA 1.2 1.213 1.225 V
I(FBP) Positive feedback input bias current V(FBP) = Vref 50 nA
I(FBN) Negative feedback input bias current V(FBN) = 0.1 Vref 50 nA
V(FBP) Positive feedback regulation voltage 1.189 1.213 1.237 V
V(FBN) Negative feedback regulation voltage –0.024 0 0.024 V
Total output dc accuracy 3%
rDS(on)(N) Inverter switch on-resistance V(VIN) = 3.6 V 440 620 mΩ
V(VIN) = 5 V 330 530
I(LIM-N) Inverter switch current limit V(VIN) = 3.6 V 1700 1950 2200 mA
rDS(on)(P) Boost switch on-resistance V(POS) = 5 V 230 390 mΩ
V(POS) = 10 V 170 230
I(LIM-P) Boost switch current limit V(VIN) = 3.6 V, V(POS) = 8 V 1700 1950 2250 mA
CONTROL STAGE
VIH High-level input voltage, ENP, ENN, PSP, PSN 1.4 V
VIL Low-level input voltage, ENP, ENN, PSP, PSN 0.4 V
Input current, ENP, ENN, PSP, PSN ENP, ENN, PSP, PSN connected to GND or VIN 0.01 0.1 µA
R(BSW) Output resistance 27 kΩ
IQ Quiescent current VIN V(VIN) = 3.6 V, I(POS) = I(NEG) = 0,
ENP = ENN = PSP = PSN = V(VIN),
V(POS) = 8 V, V(NEG) = –5 V		 300 500 µA
VPOS 100 120
VNEG 100 120
ISD Shutdown supply current ENN = ENP = LOW, TA = –40°C to 85°C 0.2 1.5 µA
V(UVLO) Undervoltage lockout threshold 2.1 2.35 2.7 V
T(TS) Thermal shutdown 150 °C
T(TS-HYS) Thermal shutdown hysteresis Junction temperature decreasing 5 °C

6.6 Switching Characteristics

The specification applies over the full recommended input voltage range VI = 2.7 V to 5.5 V and over the temperature range TJ = –40 °C to 125°C unless otherwise noted. Typical values apply for VI = 3.6 V and TJ = 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
FREQUENCY
f Oscillator frequency 1150 1380 1500 kHz
DUTY CYCLE
D(MAX-P) Maximum-duty-cycle, boost converter 87.5%
D(MAX-N) Maximum-duty-cycle, inverting converter 87.5%
D(MIN-P) Minimum-duty-cycle, boost converter 12.5%
D(MIN-N) Minimum-duty-cycle, inverting converter 12.5%

6.7 Typical Characteristics

At 25°C, unless otherwise noted.
TPS65131-Q1 D001_SLVSBB2.gif
Figure 1. Boost Converter (VPOS) Maximum Output Current vs Input Voltage
TPS65131-Q1 D003_SLVSBB2.gif
Figure 3. Shutdown Current (Into VIN and INN) Over Input Voltage
TPS65131-Q1 D002_SLVSBB2.gif
Figure 2. Inverting Converter (VPOS) Output Current vs Input Voltage
TPS65131-Q1 D004_SLVSBB2.gif
VI = 3.6 V
Figure 4. Quiescent Current (Into VIN and INN) Over Input Voltage