ZHCSLA4D May   2020  – October 2021 TPS61378-Q1

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  VCC Power Supply
      2. 8.3.2  Input Undervoltage Lockout (UVLO)
      3. 8.3.3  Enable and Soft Start
      4. 8.3.4  Shut Down
      5. 8.3.5  Switching Frequency Setting
      6. 8.3.6  Spread Spectrum Frequency Modulation
      7. 8.3.7  Adjustable Peak Current Limit
      8. 8.3.8  Bootstrap
      9. 8.3.9  Load Disconnect
      10. 8.3.10 MODE/SYNC Configuration
      11. 8.3.11 Overvoltage Protection (OVP)
      12. 8.3.12 Output Short Protection/Hiccup
      13. 8.3.13 Power-Good Indicator
      14. 8.3.14 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Forced PWM Mode
      2. 8.4.2 Auto PFM Mode
      3. 8.4.3 External Clock Synchronization
      4. 8.4.4 Down Mode
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Programming the Output Voltage
        2. 9.2.2.2 Setting the Switching Frequency
        3. 9.2.2.3 Setting the Current Limit
        4. 9.2.2.4 Selecting the Inductor
        5. 9.2.2.5 Selecting the Output Capacitors
        6. 9.2.2.6 Selecting the Input Capacitors
        7. 9.2.2.7 Loop Stability and Compensation
          1. 9.2.2.7.1 Small Signal Model
          2. 9.2.2.7.2 Loop Compensation Design Steps
          3. 9.2.2.7.3 Selecting the Bootstrap Capacitor
          4. 9.2.2.7.4 VCC Capacitor
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 第三方产品免责声明
    2. 12.2 接收文档更新通知
    3. 12.3 支持资源
    4. 12.4 Trademarks
    5. 12.5 术语表
    6. 12.6 Electrostatic Discharge Caution
  13. 13Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
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订购信息

Typical Characteristics

VIN = 3.3 V, VOUT = 9 V (VO pin), TA = 25°C, Fsw = 2.2 MHz, unless otherwise noted.
GUID-20200831-CA0I-BT0N-SRCT-3FRJ44BWXCN7-low.gif
VOUT = 5 V Auto PFM Fsw = 2.2 MHz
Figure 7-1 5 VOUT Efficiency vs Output Current
GUID-20200831-CA0I-RLPH-RSZK-0JQML6JBRP9X-low.gif
VOUT = 9 V Auto PFM Fsw = 2.2 MHz
Figure 7-3 9 VOUT Efficiency vs Output Current
GUID-20200831-CA0I-WMMK-V7BR-QLVX9PHTJJLQ-low.gif
VOUT = 9 V PFM Fsw = 2.2 MHz
Figure 7-5 9 VOUT Regulation vs Output Current
GUID-20200831-CA0I-DZRZ-L6LQ-3JZC5RFLR6TF-low.gifFigure 7-7 Shutdown Current vs Input Voltage
GUID-20200831-CA0I-SF5Q-4PNV-TKPP70GPXSGX-low.gifFigure 7-9 Reference Voltage vs Temperature
GUID-20200831-CA0I-0L1C-S3WP-L1LMWGQPJ5VF-low.gifFigure 7-11 Switching Frequency vs Setting Resistance
GUID-20200831-CA0I-PPBF-2ZTC-WCGNH034Q15W-low.gifFigure 7-13 EN Threshold Voltage vs Temperature
GUID-20200831-CA0I-BDCG-PRM5-QGPMBNJGNSTZ-low.gifFigure 7-15 RDSON vs Temperature
GUID-20200831-CA0I-7ZFG-8RKC-TJG7P6WLKWSX-low.gif
VOUT = 5 V FPWM Fsw = 2.2 MHz
Figure 7-2 5 VOUT Efficiency vs Output Current
GUID-20200831-CA0I-RR1H-SCKV-FLFPK81FVHT0-low.gif
VOUT = 9 V FPWM Fsw = 2.2 MHz
Figure 7-4 9 VOUT Efficiency vs Output Current
GUID-20200831-CA0I-FH5T-DLP6-FFCR8FDCRZLG-low.gifFigure 7-6 Quiescent Current into VIN vs Input Voltage
GUID-20200831-CA0I-QHV1-XBLD-TBQTD24D6DJ2-low.gifFigure 7-8 Fixed Output Voltage vs Temperature
GUID-20200831-CA0I-GZNH-SWJP-3GKZNQLHXV3Q-low.gifFigure 7-10 Current Limit vs Setting Resistance
GUID-20200831-CA0I-X81N-LDSX-NWPVTKZNG0C0-low.gifFigure 7-12 VIN UVLO Threshold Voltage vs Temperature
GUID-20200831-CA0I-CXPV-4MF5-VKMNLJRQ4VXC-low.gifFigure 7-14 PG Delay Time vs Temperature
GUID-20200831-CA0I-RRQK-T9JF-RHSZ4JQMZX85-low.gifFigure 7-16 Duty Cycle vs Current Limit