ZHCSC57E November   2013  – December 2017 TPS56520 , TPS56720 , TPS56920 , TPS56C20

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用范围
  3. 3 说明
    1.     Device Images
      1.      典型应用电路
  4. 4 修订历史记录
  5. 5 说明 （续）
  6. 6 List of Devices
  7. 7 Pin Configuration and Functions
    1.     Pin Functions
    2.     Pin Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Switching Characteristics
    8. 8.8 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 PWM Operation
      2. 9.3.2 PWM Frequency and Adaptive On-Time Control
      3. 9.3.3 VIN and Power VIN Terminals (VIN and PVIN)
      4. 9.3.4 Auto-Skip Eco-mode™ Control
      5. 9.3.5 Soft Start and Pre-Biased Soft Start
      6. 9.3.6 Power Good
      7. 9.3.7 Overcurrent Protection
      8. 9.3.8 UVLO Protection
    4. 9.4 Device Functional Modes
      1. 9.4.1 Operation at Light Loads
    5. 9.5 Programming
      1. 9.5.1 I2C Interface
      2. 9.5.2 I2C Protocol
      3. 9.5.3 I2C Chip Address Byte
    6. 9.6 Register Maps
      1. 9.6.1 I2C Register Address Byte
      2. 9.6.2 Output Voltage Registers
      3. 9.6.3 CheckSum Bit (VOUT Register Only)
      4. 9.6.4 Control Registers
      5. 9.6.5 Latchoff
  10. 10Applications and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 TPS56520, TPS56720 and TPS56920, 5-A, 7-A, and 9-A Converter
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Output Voltage Resistors Selection
            1. 10.2.1.2.1.1 Output Filter Selection
          2. 10.2.1.2.2 Input Capacitor Selection
          3. 10.2.1.2.3 Bootstrap Capacitor Selection
          4. 10.2.1.2.4 VREG5 Capacitor Selection
      2. 10.2.2 TPS56520, TPS56720 and TPS56920 Application Performance Curves
      3. 10.2.3 TPS56C20 12-A Converter
        1. 10.2.3.1 Design Requirements
        2. 10.2.3.2 Design Procedure
        3. 10.2.3.3 TPS56C20 Application Performance Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13器件和文档支持
    1. 13.1 器件支持
      1. 13.1.1 开发支持
    2. 13.2 文档支持
      1. 13.2.1 相关文档
    3. 13.3 相关链接
    4. 13.4 商标
    5. 13.5 静电放电警告
    6. 13.6 Glossary
  14. 14机械、封装和可订购信息

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • PWP|20
散热焊盘机械数据 (封装 | 引脚)
订购信息

9.6.2 Output Voltage Registers

The lower 7 bits of the Output Voltage Register controls the VOUT of the TPS56X20. These bits are the 7-bit selector for one of the output voltages.

As previously mentioned, when the IC powers up, the startup and output voltage regulation conditions are set by the external resistor divider feedback to the VFB terminal, the condition of the EN terminal, and the capacitance on the SS terminal.

Bringing the EN terminal high (or setting the Enable bit in Control register 9 high) begins a soft-start ramp on the regulator.

After applying VIN, VREG5 will come into regulation and the I2C interface will active. The user can activate soft start and VOUT by bring the EN terminal high or programming the Enable bit in Control Register 9.

By default, the part will regulate VOUT using the external feedback resistors connected to the VFB terminal. The user can then program VOUT by writing any VOUT code. Alternatively, if the EN terminal is low, soft start and VOUT can be enabled by writing the desired VOUT code and programming the Enable bit to a one.

Table 2. Ideal VOUT vs VOUT[6:0] Code

Code Binary VOUT Code Binary VOUT Code Binary VOUT Code Binary VOUT
0 0000000 0.60 32 0100000 0.92 64 1000000 1.24 96 1100000 1.56
1 0000001 0.61 33 0100001 0.93 65 1000001 1.25 97 1100001 1.57
2 0000010 0.62 34 0100010 0.94 66 1000010 1.26 98 1100010 1.58
3 0000011 0.63 35 0100011 0.95 67 1000011 1.27 99 1100011 1.59
4 0000100 0.64 36 0100100 0.96 68 1000100 1.28 100 1100100 1.60
5 0000101 0.65 37 0100101 0.97 69 1000101 1.29 101 1100101 1.61
6 0000110 0.66 38 0100110 0.98 70 1000110 1.30 102 1100110 1.62
7 0000111 0.67 39 0100111 0.99 71 1000111 1.31 103 1100111 1.63
8 0001000 0.68 40 0101000 1.00 72 1001000 1.32 104 1101000 1.64
9 0001001 0.69 41 0101001 1.01 73 1001001 1.33 105 1101001 1.65
10 0001010 0.70 42 0101010 1.02 74 1001010 1.34 106 1101010 1.66
11 0001011 0.71 43 0101011 1.03 75 1001011 1.35 107 1101011 1.67
12 0001100 0.72 44 0101100 1.04 76 1001100 1.36 108 1101100 1.68
13 0001101 0.73 45 0101101 1.05 77 1001101 1.37 109 1101101 1.69
14 0001110 0.74 46 0101110 1.06 78 1001110 1.38 110 1101110 1.70
15 0001111 0.75 47 0101111 1.07 79 1001111 1.39 111 1101111 1.71
16 0010000 0.76 48 0110000 1.08 80 1010000 1.40 112 1110000 1.72
17 0010001 0.77 49 0110001 1.09 81 1010001 1.41 113 1110001 1.73
18 0010010 0.78 50 0110010 1.10 82 1010010 1.42 114 1110010 1.74
19 0010011 0.79 51 0110011 1.11 83 1010011 1.43 115 1110011 1.75
20 0010100 0.80 52 0110100 1.12 84 1010100 1.44 116 1110100 1.76
21 0010101 0.81 53 0110101 1.13 85 1010101 1.45 117 1110101 1.77
22 0010110 0.82 54 0110110 1.14 86 1010110 1.46 118 1110110 1.78
23 0010111 0.83 55 0110111 1.15 87 1010111 1.47 119 1110111 1.79
24 0011000 0.84 56 0111000 1.16 88 1011000 1.48 120 1111000 1.80
25 0011001 0.85 57 0111001 1.17 89 1011001 1.49 121 1111001 1.81
26 0011010 0.86 58 0111010 1.18 90 1011010 1.50 122 1111010 1.82
27 0011011 0.87 59 0111011 1.19 91 1011011 1.51 123 1111011 1.83
28 0011100 0.88 60 0111100 1.20 92 1011100 1.52 124 1111100 1.84
29 0011101 0.89 61 0111101 1.21 93 1011101 1.53 125 1111101 1.85
30 0011110 0.90 62 0111110 1.22 94 1011110 1.54 126 1111110 1.86
31 0011111 0.91 63 0111111 1.23 95 1011111 1.55 127 1111111 1.87