ZHCS610D December   2011  – December 2021 TPS28225-Q1

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout (UVLO)
      2. 7.3.2 Output Active Low
      3. 7.3.3 Enable/Power Good
      4. 7.3.4 3-State Input
      5. 7.3.5 Bootstrap Diode
      6. 7.3.6 Upper and Lower Gate Drivers
      7. 7.3.7 Dead-Time Control
      8. 7.3.8 Thermal Shutdown
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Switching the MOSFETs
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 第三方产品免责声明
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 支持资源
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 术语表
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
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订购信息

6.5 Electrical Characteristics

VDD = 7.2 V, EN/PG pulled up to VDD by 100-kΩ resistor, TA = –40°C to 105°C (unless otherwise noted)(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
UNDER VOLTAGE LOCKOUT
Rising threshold VPWM = 0 V 3.2 3.5 3.8 V
VPWM = 0 V, TA = 25°C 3.5
Falling threshold VPWM = 0 V 2.7 V
VPWM = 0 V, TA = 25°C 3
Hysteresis TA = 25°C 0.5 V
BIAS CURRENTS
IDD(off) Bias supply current VEN/PG = low, PWM pin floating,
TA = 25°C		 350 μA
IDD Bias supply current VEN/PG = high, PWM pin floating,
TA = 25°C		 500 μA
INPUT (PWM)
IPWM Input current VPWM = 5 V, TA = 25°C 185 μA
VPWM = 0 V, TA = 25°C –200 μA
PWM 3-state rising threshold(2) TA = 25°C 1 V
PWM 3-state falling threshold VPWM PEAK = 5 V 3.4 4 V
VPWM PEAK = 5 V, TA = 25°C 3.8
tHLD_R 3-state shutdown hold-off time TA = 25°C 250 ns
TMIN PWM minimum pulse to force UGATE pulse CL = 3 nF at UGATE, VPWM = 5 V 30 ns
ENABLE/POWER GOOD (EN/PG)
Enable high rising threshold PG FET OFF 2.1 V
PG FET OFF, TA = 25°C 1.7
Enable low falling threshold PG FET OFF 0.8 V
PG FET OFF, TA = 25°C 1
Hysteresis TA = 25°C 0.35 V
0.7
Power good output VDD = 2.5 V 0.2 V
UPPER GATE DRIVER OUTPUT (UGATE)
Source resistance 500-mA source current 2 Ω
500-mA source current, TA = 25°C 1
Source current(2) VUGATE-PHASE = 2.5 V, TA = 25°C 2 A
tRU Rise time CL = 3 nF, TA = 25°C 10 ns
Sink resistance 500-mA sink current 2 Ω
500-mA sink current, TA = 25°C 1
Sink current(2) VUGATE-PHASE = 2.5 V, TA = 25°C 2 A
tFU Fall time CL = 3 nF, TA = 25°C 10 ns
LOWER GATE DRIVER OUTPUT (LGATE)
Source resistance 500-mA source current 2 Ω
500-mA source current, TA = 25°C 1
Source current(2) VLGATE = 2.5 V, TA = 25°C 2 A
tRL Rise time(2) CL = 3 nF, TA = 25°C 10 ns
Sink resistance 500-mA sink current 1 Ω
500-mA sink current, TA = 25°C 0.4
Sink current(2) VLGATE = 2.5 V, TA = 25°C 4 A
Fall time(2) CL = 3 nF, TA = 25°C 5 ns
BOOTSTRAP DIODE
VF Forward voltage Forward bias current 100 mA,
TA = 25°C		 1 V
THERMAL SHUTDOWN
Rising threshold(2) 150 170 °C
TA = 25°C 160
Falling threshold(2) 130 150 °C
TA = 25°C 140
Hysteresis TA = 25°C 20 °C
(1) Typical values for TA = 25°C
(2) Not production tested