ZHCSOF3G April   2006  – July 2021 TLV320AIC3106

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 说明（续）
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements: Audio Data Serial Interface (1)
    7. 8.7 Timing Diagrams
    8. 8.8 Typical Characteristics
  9. 9 Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
      1. 10.3.1  Hardware Reset
      2. 10.3.2  Digital Audio Data Serial Interface
        1. 10.3.2.1 Right-Justified Mode
        2. 10.3.2.2 Left-Justified Mode
        3. 10.3.2.3 I2S Mode
        4. 10.3.2.4 DSP Mode
        5. 10.3.2.5 TDM Data Transfer
      3. 10.3.3  Audio Data Converters
        1. 10.3.3.1 Audio Clock Generation
        2. 10.3.3.2 Stereo Audio ADC
          1. 10.3.3.2.1 Stereo Audio ADC High-Pass Filter
          2. 10.3.3.2.2 Automatic Gain Control (AGC)
            1. 10.3.3.2.2.1 Target Level
            2. 10.3.3.2.2.2 Attack Time
            3. 10.3.3.2.2.3 Decay Time
            4. 10.3.3.2.2.4 Noise Gate Threshold
            5. 10.3.3.2.2.5 Maximum PGA Gain Applicable
        3. 10.3.3.3 Stereo Audio DAC
          1. 10.3.3.3.1 Digital Audio Processing for Playback
          2. 10.3.3.3.2 Digital Interpolation Filter
          3. 10.3.3.3.3 Delta-Sigma Audio DAC
          4. 10.3.3.3.4 Audio DAC Digital Volume Control
          5. 10.3.3.3.5 Increasing DAC Dynamic Range
          6. 10.3.3.3.6 Analog Output Common-Mode Adjustment
          7. 10.3.3.3.7 Audio DAC Power Control
      4. 10.3.4  Audio Analog Inputs
      5. 10.3.5  Analog Fully Differential Line Output Drivers
      6. 10.3.6  Analog High Power Output Drivers
      7. 10.3.7  Input Impedance and VCM Control
      8. 10.3.8  General-Purpose I/O
      9. 10.3.9  Digital Microphone Connectivity
      10. 10.3.10 Micbias Generation
      11. 10.3.11 Short Circuit Output Protection
      12. 10.3.12 Jack/Headset Detection
    4. 10.4 Device Functional Modes
      1. 10.4.1 Bypass Path Mode
        1. 10.4.1.1 Analog Input Bypass Path Functionality
        2. 10.4.1.2 ADC PGA Signal Bypass Path Functionality
        3. 10.4.1.3 Passive Analog Bypass During Powerdown
      2. 10.4.2 Digital Audio Processing for Record Path
    5. 10.5 Programming
      1. 10.5.1 Digital Control Serial Interface
        1. 10.5.1.1 SPI Control Mode
          1. 10.5.1.1.1 SPI Communication Protocol
          2. 10.5.1.1.2 Limitation on Register Writing
          3. 10.5.1.1.3 Continuous Read / Write Operation
        2. 10.5.1.2 I2C Control Interface
          1. 10.5.1.2.1 I2C BUS Debug in a Glitched System
    6. 10.6 Register Maps
      1. 10.6.1 Output Stage Volume Controls
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
      3. 11.2.3 Application Curves
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Examples
  14. 14Device and Documentation Support
    1. 14.1 接收文档更新通知
    2. 14.2 支持资源
    3. 14.3 Trademarks
    4. 14.4 Electrostatic Discharge Caution
    5. 14.5 术语表

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • RGZ|48
  • ZXH|80
散热焊盘机械数据 (封装 | 引脚)
订购信息

8.5 Electrical Characteristics

at 25°C, AVDD_DAC, DRVDD, IOVDD = 3.3 V, DVDD = 1.8 V, fS = 48-kHz, 16-bit audio data (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
AUDIO ADC
Input signal level (0-dB) Single-ended input 0.707 VRMS
Signal-to-noise ratio, A-weighted(1) (2) fS = 48 ksps, 0-dB PGA gain, inputs ac-shorted to ground 80 92 dB
Dynamic range (2) fS = 48 ksps, 0-dB PGA gain, –60 dB full-scale input signal 91 dB
THD Total harmonic distortion fS = 48 ksps, 0-dB PGA gain, –2dB full-scale, 1-kHz input signal –88 –70 dB
PSRR Power supply rejection ratio 217-Hz signal applied to DRVDD 49 dB
1-kHz signal applied to DRVDD 46
Gain error fS = 48 ksps, 0-dB PGA gain, –2dB full-scale, 1-kHz input signal 0.84 dB
Input channel separation 1-kHz, –2-dB full-scale signal, MIC3L to MIC3R –86 dB
1-kHz, –2-dB full-scale signal, MIC2L to MIC2R –98
1-kHz, –2-dB full-scale signal, MIC1L to MIC1R –75
ADC programmable gain amplifier maximum gain 1-kHz input tone 59.5 dB
ADC programmable gain amplifier step size 0.5 dB
Input resistance MIC1L/MIC1R inputs routed to single ADC
Input mix attenuation = 0 dB		 20 kΩ
MIC1L/MIC1R inputs routed to single ADC, input mix attenuation = 12 dB 80
MIC2L/MIC2R inputs routed to single ADC
Input mix attenuation = 0 dB		 20
MIC2L/MIC2R inputs routed to single ADC, input mix attenuation = 12 dB 80
MIC3L/MIC3R inputs routed to single ADC
Input mix attenuation = 0 dB		 20
MIC3L/MIC3R inputs routed to single ADC, input mix attenuation = 12 dB 80
Input level control minimum attenuation setting 0 dB
Input level control maximum attenuation setting 12 dB
Input signal level Differential Input 1.414 VRMS
Signal-to-noise ratio, A-weighted(1) (2) fS = 48 ksps, 0-dB PGA gain, inputs ac-shorted to ground,
differential mode		 92 dB
THD Total harmonic distortion fS = 48 ksps, 0-dB PGA gain, –2-dB full-scale 1-kHz input signal, differential mode –91 dB
ANALOG PASS THROUGH MODE
Input to output switch resistance, (rdsON) MIC1/LINE1 to LINE_OUT 330 Ω
MIC2/LINE2 to LINE_OUT 330
ADC DIGITAL DECIMATION FILTER, fS = 48 kHz
Filter gain from 0 to 0.39 fS ±0.1 dB
Filter gain at 0.4125 fS –0.25 dB
Filter gain at 0.45 fS –3 dB
Filter gain at 0.5 fS –17.5 dB
Filter gain from 0.55 fS to 64 fS –75 dB
Filter group delay 17/fS s
MICROPHONE BIAS
Bias voltage Programmable setting = 2.0 2.0 V
Programmable setting = 2.5 2.3 2.5 2.7
Programmable setting = DRVDD DRVDD
Current sourcing Programmable setting = 2.5V 4 mA
AUDIO DAC – Differential Line output, load = 10 kΩ
Full-scale output voltage 0-dB input full-scale signal, output volume control = 0 dB, output common-mode setting = 1.35 V 1.414 VRMS
SNR Signal-to-noise ratio, A-weighted(3) No input signal, output volume control = 0 dB, output common mode
setting = 1.35 V, fS = 48 kHz		 90 102 dB
Dynamic range, A-weighted –60 dB 1-kHz input full-scale signal, output volume control = 0 dB, output common-mode setting = 1.35 V, fS = 48 kHz 99 dB
THD Total harmonic distortion 0-dB 1-kHz input full-scale signal, output volume control = 0 dB, output common-mode setting = 1.35 V, fS = 48 kHz –94 –75 dB
Power-supply rejection ratio 217-Hz signal applied to DRVDD, AVDD_DAC 77 dB
1-kHz signal applied to DRVDD, AVDD_DAC 73
DAC channel separation 0-dB full-scale input signal between left and right Lineout 123 dB
DAC gain error 0-dB 1-kHz input full-scale signal, output volume control = 0 dB, output common-mode setting = 1.35 V, fS = 48 kHz –0.4 dB
AUDIO DAC – SINGLE ENDED LINE OUTPUT, Load = 10 kΩ
Full-scale output voltage 0-dB input full-scale signal, output volume control = 0 dB, output common-mode setting = 1.35 V 0.707 VRMS
SNR Signal-to-noise ratio, A-weighted No input signal, output volume control = 0 dB, output common-mode
setting = 1.35 V, fS = 48 kHz		 97 dB
THD Total harmonic distortion 0-dB 1-kHz input full-scale signal, output volume control = 0 dB, output common-mode setting = 1.35 V, fS = 48 kHz 84 dB
DAC gain error 0-dB 1-kHz input full-scale signal, output volume control = 0 dB, output common-mode setting = 1.35 V, fS = 48 kHz 0.55 dB
AUDIO DAC – SINGLE ENDED HEADPHONE OUTPUT, Load = 16 Ω
Full-scale output voltage 0-dB input full-scale signal, output volume control = 0 dB, output common-mode setting = 1.35 V 0.707 VRMS
SNR Signal-to-noise ratio, A-weighted No input signal, output volume control = 0 dB, output common-mode
setting = 1.35 V, fS = 48 kHz		 95 dB
No input signal, output volume control = 0 dB, output common-mode
setting = 1.35 V, fS = 48 kHz, 50% DAC current boost mode		 96 dB
Dynamic range, A-weighted –60-dB 1-kHz input full-scale signal, output volume control = 0 dB, output common-mode setting = 1.35 V, fS = 48 kHz 92 dB
THD Total harmonic distortion 0-dB 1-kHz input full-scale signal, output volume control = 0 dB, output common-mode setting = 1.35 V, fS = 48 kHz –80 –65 dB
PSRR Power-supply rejection ratio 217-Hz signal applied to DRVDD, AVDD_DAC 41 dB
1-kHz signal applied to DRVDD, AVDD_DAC 44
DAC channel separation 0-dB full-scale input signal between left and right Lineout 84 dB
DAC gain error 0-dB 1-kHz input full-scale signal, output volume control = 0 dB, output common-mode setting = 1.35 V, fS = 48 kHz –0.5 dB
AUDIO DAC – LINEOUT AND HEADPHONE OUT DRIVERS
Output common mode First option 1.35 V
Second option 1.5
Third option 1.65
Fourth option 1.8
Output volume control max setting 9 dB
Output volume control step size 1 dB
DAC DIGITAL INTERPOLATION – FILTER fS = 48 ksps
Pass band 0 0.45 fS Hz
Pass-band ripple ±0.06 dB
Transition band 0.45 fS 0.55 fS Hz
Stop band 0.55 fS 7.5 fS Hz
Stop-band attenuation 65 dB
Group delay 21/fS s
DIGITAL I/O
VIL Input low level –0.3 0.3 × IOVDD V
VIH Input high level(4) IOVDD > 1.6 V 0.7 × IOVDD V
IOVDD < 1.6 V 1.1
VOL Output low level 0.1 × IOVDD V
VOH Output high level 0.8 × IOVDD V
POWER CONSUMPTION, DRVDD, AVDD_DAC = 3.3 V, DVDD = 1.8 V, IOVDD = 3.3 V
Current consumption IDRVDD+IAVDD_DAC RESET held low 0.1 μA
IDVDD 0.2
IDRVDD+IAVDD_DAC Mono ADC record, fS = 8 kSPS, I2S slave, AGC off, no signal 2.1 mA
IDVDD 0.5
IDRVDD+IAVDD_DAC 4.1 mA
IDVDD 0.6
IDRVDD+IAVDD_DAC Stereo ADC record, fS = 48 kSPS, I2S slave, AGC off, no signal 4.3 mA
IDVDD 2.5
IDRVDD+IAVDD_DAC Stereo DAC playback to line out, analog mixer bypassed, fS = 48 kSPS, I2S slave 3.5 mA
IDVDD 2.3
IDRVDD+IAVDD_DAC Stereo DAC playback to line out, fS = 48 kSPS, I2S slave, no signal 4.9 mA
IDVDD 2.3
IDRVDD+IAVDD_DAC Stereo DAC playback to stereo single-ended headphone, fS = 48 kSPS, I2S slave, no signal 6.7 mA
IDVDD 2.3
IDRVDD+IAVDD_DAC Stereo line in to stereo line out, no signal 3.1 mA
IDVDD 0
IDRVDD+IAVDD_DAC Extra power when PLL enabled 1.4 mA
IDVDD 0.9
IDRVDD+IAVDD_DAC All blocks powered down, headset detection enabled 28 μA
IDVDD 2
(1) Ratio of output level with 1-kHz full-scale sine-wave input, to the output level with the inputs short circuited, measured A-weighted over a 20-Hz to 20-kHz bandwidth using an audio analyzer.
(2) All performance measurements done with 20-kHz low-pass filter and, where noted, A-weighted filter. Failure to use such a filter may result in higher THD+N and lower SNR and dynamic range readings than shown in the Electrical Characteristics. The low-pass filter removes out-of-band noise, which, although not audible, may affect dynamic specification values.
(3) Unless otherwise noted, all measurements use output common-mode voltage setting of 1.35 V, 0-dB output level control gain, 16-Ω single-ended load.
(4) When IOVDD < 1.6 V, minimum VIH is 1.1 V.