SLAS354C September   2001  – September 2015 TLV2553

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  External Reference Specifications
    7. 6.7  Operating Characteristics
    8. 6.8  Timing Requirements: VREF+ = 5 V
    9. 6.9  Timing Requirements: VREF+ = 2.5 V
    10. 6.10 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog MUX
      2. 8.3.2 Reference
    4. 8.4 Device Functional Modes
      1. 8.4.1  Converter Operation
      2. 8.4.2  Data I/O Cycle
      3. 8.4.3  Sampling Cycle
      4. 8.4.4  Conversion Cycle
      5. 8.4.5  Power Up and Initialization
        1. 8.4.5.1 Example
      6. 8.4.6  Data Input
      7. 8.4.7  Data Input—Address/Command Bits
      8. 8.4.8  Data Output Length
      9. 8.4.9  LSB Out First
      10. 8.4.10 Bipolar Output Format
      11. 8.4.11 EOC Output
      12. 8.4.12 Chip-Select Input (CS)
      13. 8.4.13 Power-Down Features
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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10 Power Supply Recommendations

The TLV2553 is designed to operate from a single power supply voltage from 2.7 V ti 5.5 V. The ADC supply voltage must be well-regulated. A 1-μF ceramic decoupling capacitor is required and must be placed as close as possible to the device to minimize inductance along the load current path.

Many modern microcontrollers have interfaces that support only up to 3.3-V logic levels, which is incompatible with the TLV2553 when the device is operated on a 5-V power supply. In such cases, 5-V to 3.3-V digital level translators may be used to facilitate communication between the TLV2553 and the microcontroller host.