ZHCSFS0A December 2016 – June 2018 SN65DSI83-Q1
PRODUCTION DATA.
Many of the SN65DSI83-Q1 functions are controlled by the Control and Status Registers (CSR). All CSR registers are accessible through the local I2C interface.
See the following tables for the SN65DSI83-Q1 CSR descriptions. Reserved or undefined bit fields should not be modified. Otherwise, the device may operate incorrectly.