SLLSFW9 April   2024 ISO7741TA-Q1

ADVANCE INFORMATION  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety-Related Certifications
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics Transformer
    10. 5.10 Electrical Characteristics—5-V Supply
    11. 5.11 Supply Current Characteristics—5-V Supply
    12. 5.12 Electrical Characteristics—3.3-V Supply
    13. 5.13 Supply Current Characteristics—3.3-V Supply
    14. 5.14 Electrical Characteristics—2.5-V Supply 
    15. 5.15 Supply Current Characteristics—2.5-V Supply
    16. 5.16 Switching Characteristics—5-V Supply
    17. 5.17 Switching Characteristics—3.3-V Supply
    18. 5.18 Switching Characteristics—2.5-V Supply
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Electromagnetic Compatibility (EMC) Considerations
      2. 6.3.2 Push-Pull Converter
      3. 6.3.3 Core Magnetization
    4. 6.4 Device Functional Modes
      1. 6.4.1 Device I/O Schematics
      2. 6.4.2 Start-Up Mode
      3. 6.4.3 Operating Mode
      4. 6.4.4 Spread Spectrum Clocking
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Drive Capability
        2. 7.2.2.2 LDO Selection
        3. 7.2.2.3 Diode Selection
        4. 7.2.2.4 Capacitor Selection
        5. 7.2.2.5 Transformer Selection
          1. 7.2.2.5.1 V-t Product Calculation
          2. 7.2.2.5.2 Turns Ratio Estimate
          3. 7.2.2.5.3 Recommended Transformers
      3. 7.2.3 Application Curve
        1. 7.2.3.1 Insulation Lifetime
      4. 7.2.4 System Examples
        1. 7.2.4.1 Higher Output Voltage Designs
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • DW|16
散热焊盘机械数据 (封装 | 引脚)
订购信息

Capacitor Selection

As with all high speed CMOS ICs, the device requires a bypass capacitor in the range of 10nF to 100nF.

The input bulk capacitor at the center-tap of the primary supports large currents into the primary during the fast switching transients. For minimum ripple make this capacitor 1μF to 10μF. In a 2-layer PCB design with a dedicated ground plane, place this capacitor close to the primary center-tap to minimize trace inductance. In a 4-layer board design with low-inductance reference planes for ground and VCC, the capacitor can be placed at the supply entrance of the board. To provide low-inductance paths use two vias in parallel for each connection to a reference plane or to the primary center-tap.

The bulk capacitor at the rectifier output smooths the output voltage. Make this capacitor 1μF to 10μF.

The small capacitor at the regulator input is not necessarily required. However, good analog design practice suggests, using a small value of 47nF to 100nF improves the transient response and noise rejection of the regulator.

The LDO output capacitor buffers the regulated output for the subsequent isolator and transceiver circuitry. The choice of output capacitor depends on the LDO stability requirements specified in the data sheet. However, in most cases, a low-ESR ceramic capacitor in the range of 4.7μF to 10μF satisfies these requirements.