ZHCSKW7D October 2003 – February 2020 ADS1204
PRODUCTION DATA.
7.3.1.2 Modulator
The ADS1204 can be operated in two modes. When CKLSEL = 1, the four modulators operate using the internal clock, which is fixed at 20 MHz. When CKLSEL = 0, the modulators operate using an external clock . In both modes, the clock is divided by two internally and functions as the modulator clock. The frequency of the external clock can vary from 1 MHz to 32 MHz to adjust for the clock requirements of the application.
The modulator topology is fundamentally a second-order, switched-capacitor, ΔΣ modulator, such as the one conceptualized in Figure 29. The analog input voltage and the output of the 1-bit digital-to-analog converter (DAC) are differentiated, providing analog voltages at X2 and X3. The voltages at X2 and X3 are presented to their individual integrators. The output of these integrators progresses in a negative or positive direction. When the value of the signal at X4 equals the comparator reference voltage, the output of the comparator switches from negative to positive, or positive to negative, depending on its original state. When the output value of the comparator switches from high to low or vice versa, the 1-bit DAC responds on the next clock pulse by changing its analog output voltage at X6, causing the integrators to progress in the opposite direction. The feedback of the modulator to the front end of the integrators forces the value of the integrator output to track the average of the input.
Figure 29. Block Diagram of the Second-Order Modulator