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TPS54060A

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具有 Eco-Mode 的 3.5V 至 60V 输入、0.5A 降压转换器

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LMR36506 正在供货 具有 4μA IQ 的 3V 至 65V、0.6A 超小型同步降压转换器 Smaller footprint, lower IQ and lower EMI.

TPS54060A

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产品详情

Rating Catalog Topology Buck Iout (max) (A) 0.5 Vin (max) (V) 60 Vin (min) (V) 3.5 Vout (max) (V) 58 Vout (min) (V) 0.8 Features Enable, Frequency synchronization, Light Load Efficiency, Over Current Protection, Power good, Tracking, UVLO adjustable Control mode current mode Operating temperature range (°C) -40 to 125 Iq (typ) (A) 0.000116 Duty cycle (max) (%) 98
Rating Catalog Topology Buck Iout (max) (A) 0.5 Vin (max) (V) 60 Vin (min) (V) 3.5 Vout (max) (V) 58 Vout (min) (V) 0.8 Features Enable, Frequency synchronization, Light Load Efficiency, Over Current Protection, Power good, Tracking, UVLO adjustable Control mode current mode Operating temperature range (°C) -40 to 125 Iq (typ) (A) 0.000116 Duty cycle (max) (%) 98
HVSSOP (DGQ) 10 14.7 mm² (3 mm × 4.9 mm) VSON (DRC) 10 9 mm² (3 mm × 3 mm)
  • 3.5V to 60V Input Voltage Range
  • 200-mΩ High-Side MOSFET
  • High Efficiency at Light Loads with a Pulse
    Skipping Eco-Mode™
  • Tighter Enable Threshold than TPS54060
    for More Accurate UVLO Voltage
  • Adjustable UVLO Voltage and Hysteresis
  • 116µA Operating Quiescent Current
  • 1.3µA Shutdown Current
  • 100kHz to 2.5MHz Switching Frequency
  • Synchronizes to External Clock
  • Adjustable Slow Start/Sequencing
  • UV and OV Power Good Output
  • 0.8-V Internal Voltage Reference
  • MSOP-10 and 3mm × 3mm VSON-10
    Package With PowerPAD™
  • Supported by WEBENCH® and SwitcherPro™
    Software Tool
  • 3.5V to 60V Input Voltage Range
  • 200-mΩ High-Side MOSFET
  • High Efficiency at Light Loads with a Pulse
    Skipping Eco-Mode™
  • Tighter Enable Threshold than TPS54060
    for More Accurate UVLO Voltage
  • Adjustable UVLO Voltage and Hysteresis
  • 116µA Operating Quiescent Current
  • 1.3µA Shutdown Current
  • 100kHz to 2.5MHz Switching Frequency
  • Synchronizes to External Clock
  • Adjustable Slow Start/Sequencing
  • UV and OV Power Good Output
  • 0.8-V Internal Voltage Reference
  • MSOP-10 and 3mm × 3mm VSON-10
    Package With PowerPAD™
  • Supported by WEBENCH® and SwitcherPro™
    Software Tool

The TPS54060A device is a 60V, 0.5A, step down regulator with an integrated high side MOSFET. Current mode control provides simple external compensation and flexible component selection. A low ripple pulse skip mode reduces the no load, regulated output supply current to 116µA. Using the enable pin, shutdown supply current is reduced to 1.3µA, when the enable pin is low.

Under voltage lockout is internally set at 2.5V, but can be increased using the enable pin. The output voltage startup ramp is controlled by the slow start pin that can also be configured for sequencing/tracking. An open drain power good signal indicates the output is within 94% to 107% of its nominal voltage.

A wide switching frequency range allows efficiency and external component size to be optimized. Frequency fold back and thermal shutdown protects the part during an overload condition.

The TPS54060A device is a 60V, 0.5A, step down regulator with an integrated high side MOSFET. Current mode control provides simple external compensation and flexible component selection. A low ripple pulse skip mode reduces the no load, regulated output supply current to 116µA. Using the enable pin, shutdown supply current is reduced to 1.3µA, when the enable pin is low.

Under voltage lockout is internally set at 2.5V, but can be increased using the enable pin. The output voltage startup ramp is controlled by the slow start pin that can also be configured for sequencing/tracking. An open drain power good signal indicates the output is within 94% to 107% of its nominal voltage.

A wide switching frequency range allows efficiency and external component size to be optimized. Frequency fold back and thermal shutdown protects the part during an overload condition.
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技术文档

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 TPS54060A 0.5-A, 60-V Step-Down DC–DC Converter With Eco-Mode™ 数据表 (Rev. C) PDF | HTML 2016-1-15
选择指南 电源管理指南 2018 2018-7-31
应用手册 Design Considerations for DC-DC Converters in Fast-Input Slew Rate Applications 2015-3-5
应用手册 Methods to Improve Low Dropout Operation with the TPS54240 and TPS54260 (Rev. A) 2013-11-6
应用手册 Differences between the TPS54x40, TPS54x60 and the TPS54x40A, TPS54x60A 2013-4-17
应用手册 Level Shifting Control for an Inverting Buck-boost 2012-10-10

设计与开发

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评估板

EVM430-F67641 — 具有 MSP430F67641 SoC 的多相电表

此 EVM 采用 MSP430F67641 多相计量片上系统实现完整的智能仪表设计。此设计满足 ANSI/IEC 0.5 类精度的所有要求。F67641 SoC 拥有 128KB 片上闪存以及一个 320 段 LCD 控制器，提供应对低成本多相仪表设计挑战的单芯片解决方案。

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评估板

TPS54060EVM-457 — TPS54060 48V 输入、3.3V 输出、0.5A 评估模块

The TPS54060 dc/dc converter is designed to provide up to a 0.5-A output from an input voltage source of 3.5 V to 60 V. This evaluation module is designed to demonstrate the small, printed-circuit-board areas that may be achieved when designing with the TPS54060 regulator. The switching frequency (...)
用户指南: PDF
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评估板

TPS54060EVM-590 — 100mA 分离轨 SWIFT™ 转换器评估模块

TPS54060 DC/DC 转换器设计用于以 3.5V 至 60V 的输入电压源提供 0.5A 的输出电流。用户指南的表 1 中列出了 TPS54060EVM-590 评估模块的额定输入电压和输出电流范围。此评估模块用于演示变压器耦合分离轨（在电源高达 ±100mA 时提供 ±18V 的双路输出）。针对此应用中 TPS54060，-18V 输出电压会被用作接地参考；这能让正负输出的总和被分解并发送到 VSNS 引脚，从而实现稳压。开关频率通过 RT/CLK 引脚上的电阻被外部设置为 300kHz，补偿组件也位于集成电路 (IC) 之外。TPS54060 封装内部采用了高侧 MOSFET (...)
用户指南: PDF
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仿真模型

TPS54060 PSpice Transient Model

SLIM070.ZIP (65 KB) - PSpice 模型
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仿真模型

TPS54060 TINA-TI Transient Reference Design

SLIM138.TSC (470 KB) - TINA-TI 参考设计
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仿真模型

TPS54060 TINA-TI Transient Spice Model

SLIM137.TSM (58 KB) - TINA-TI Spice 模型
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仿真模型

TPS54060A PSpice Average Model

SLVM916.ZIP (85 KB) - PSpice 模型
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仿真模型

TPS54060A Unencrypted PSpice Average Model

SLVMCU6.ZIP (1 KB) - PSpice 模型
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计算工具

SLVC432 — TPS54x40 and TPS54x60 Buck Design Spreadsheet

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参考设计

TIDA-00179 — 连接至绝对位置编码器的通用数字接口参考设计

TIDA-00179 是符合 EMC 标准的通用数字接口，可连接 EnDat 2.2、BiSS®、SSI 或 HIPERFACE DSL® 等绝对位置编码器。此参考设计支持 15V 至 60V（标称电压为 24V）的宽输入电压范围。具有 3.3V 逻辑 I/O 信号的连接器支持与 Sitara AM437x 或 Delfino F28379 等主机处理器直接连接，从而运行相应的主协议。

Sitara AM437x（EnDat2.2、BiSS 和 HIPERFACE DSL）或 Delfino DesignDRIVE（EnDat2.2 和 BiSS）提供主器件实现。此设计支持主机处理器选择 4 (...)

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封装 引脚 CAD 符号、封装和 3D 模型
HVSSOP (DGQ) 10 Ultra Librarian
VSON (DRC) 10 Ultra Librarian
适用于评估类项目的 TI 标准条款与条件。

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