TMS320C6701

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C67x 浮点 DSP - 高达 167MHz、McBSP

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数据表

document-pdfAcrobat TMS320C6701 Floating-Point DSP 数据表 (Rev. F) (英语)

TMS320C6701

正在供货

数据表

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产品详情

CPU

32-/64-bit

Operating system

DSP/BIOS

Rating

Catalog

Operating temperature range (°C)

-40 to 105

CPU

32-/64-bit

Operating system

DSP/BIOS

Rating

Catalog

Operating temperature range (°C)

-40 to 105

FCBGA (GJC)

352

1225 mm² (35 mm × 35 mm)

Highest Performance Floating-Point Digital Signal Processor (DSP) TMS320C6701
- 8.3-, 6.7-, 6-ns Instruction Cycle Time
- 120-, 150-, 167-MHz Clock Rate
- Eight 32-Bit Instructions/Cycle
- 1 GFLOPS
- TMS320C6201 Fixed-Point DSP Pin-Compatible
VelociTI™ Advanced Very Long Instruction Word (VLIW) C67x™ CPU Core
- Eight Highly Independent Functional Units:
  - Four ALUs (Floating- and Fixed-Point)
  - Two ALUs (Fixed-Point)
  - Two Multipliers (Floating- and Fixed-Point)
- Load-Store Architecture With 32 32-Bit General-Purpose Registers
- Instruction Packing Reduces Code Size
- All Instructions Conditional
Instruction Set Features
- Hardware Support for IEEE Single-Precision Instructions
- Hardware Support for IEEE Double-Precision Instructions
- Byte-Addressable (8-, 16-, 32-Bit Data)
- 8-Bit Overflow Protection
- Saturation
- Bit-Field Extract, Set, Clear
- Bit-Counting
- Normalization
1M-Bit On-Chip SRAM
- 512K-Bit Internal Program/Cache (16K 32-Bit Instructions)
- 512K-Bit Dual-Access Internal Data (64K Bytes)
32-Bit External Memory Interface (EMIF) to Synchronous/Asynchronous Memories
- Glueless Interface to Synchronous Memories: SDRAM and SBSRAM
- Glueless Interface to Asynchronous Memories: SRAM and EPROM
- 52M-Byte Addressable External Memory Space
Four-Channel Bootloading Direct-Memory-Access (DMA) Controller With an Auxiliary Channel
16-Bit Host-Port Interface (HPI)
- Access to Entire Memory Map
Two Multichannel Buffered Serial Ports (McBSPs)
- Direct Interface to T1/E1, MVIP, SCSA Framers
- ST-Bus-Switching Compatible
- Up to 256 Channels Each
- AC97-Compatible
- Serial-Peripheral-Interface (SPI) Compatible (Motorola™)
Two 32-Bit General-Purpose Timers
Flexible Phase-Locked-Loop (PLL) Clock Generator
IEEE-1149.1 (JTAG) Boundary-Scan-Compatible
352-Pin Ball Grid Array (BGA) Package (GJC Suffix)
0.18-µm/5-Level Metal Process
- CMOS Technology
3.3-V I/Os, 1.8-V Internal (120-, 150-MHz)
3.3-V I/Os, 1.9-V Internal (167-MHz Only)

VelociTI is a trademark of Texas Instruments.
Motorola is a trademark of Motorola, Inc.
IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.
TMS320C6000 is a trademark of Texas Instruments.
Windows is a registered trademark of Microsoft Corporation.

Highest Performance Floating-Point Digital Signal Processor (DSP) TMS320C6701
- 8.3-, 6.7-, 6-ns Instruction Cycle Time
- 120-, 150-, 167-MHz Clock Rate
- Eight 32-Bit Instructions/Cycle
- 1 GFLOPS
- TMS320C6201 Fixed-Point DSP Pin-Compatible
VelociTI™ Advanced Very Long Instruction Word (VLIW) C67x™ CPU Core
- Eight Highly Independent Functional Units:
  - Four ALUs (Floating- and Fixed-Point)
  - Two ALUs (Fixed-Point)
  - Two Multipliers (Floating- and Fixed-Point)
- Load-Store Architecture With 32 32-Bit General-Purpose Registers
- Instruction Packing Reduces Code Size
- All Instructions Conditional
Instruction Set Features
- Hardware Support for IEEE Single-Precision Instructions
- Hardware Support for IEEE Double-Precision Instructions
- Byte-Addressable (8-, 16-, 32-Bit Data)
- 8-Bit Overflow Protection
- Saturation
- Bit-Field Extract, Set, Clear
- Bit-Counting
- Normalization
1M-Bit On-Chip SRAM
- 512K-Bit Internal Program/Cache (16K 32-Bit Instructions)
- 512K-Bit Dual-Access Internal Data (64K Bytes)
32-Bit External Memory Interface (EMIF) to Synchronous/Asynchronous Memories
- Glueless Interface to Synchronous Memories: SDRAM and SBSRAM
- Glueless Interface to Asynchronous Memories: SRAM and EPROM
- 52M-Byte Addressable External Memory Space
Four-Channel Bootloading Direct-Memory-Access (DMA) Controller With an Auxiliary Channel
16-Bit Host-Port Interface (HPI)
- Access to Entire Memory Map
Two Multichannel Buffered Serial Ports (McBSPs)
- Direct Interface to T1/E1, MVIP, SCSA Framers
- ST-Bus-Switching Compatible
- Up to 256 Channels Each
- AC97-Compatible
- Serial-Peripheral-Interface (SPI) Compatible (Motorola™)
Two 32-Bit General-Purpose Timers
Flexible Phase-Locked-Loop (PLL) Clock Generator
IEEE-1149.1 (JTAG) Boundary-Scan-Compatible
352-Pin Ball Grid Array (BGA) Package (GJC Suffix)
0.18-µm/5-Level Metal Process
- CMOS Technology
3.3-V I/Os, 1.8-V Internal (120-, 150-MHz)
3.3-V I/Os, 1.9-V Internal (167-MHz Only)

The TMS320C67x DSPs are the floating-point DSP family in the TMS320C6000™ DSP platform. The TMS320C6701 (C6701) device is based on the high-performance, advanced VelociTI very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making this DSP an excellent choice for multichannel and multifunction applications. With performance of up to 1 giga floating-point operations per second (GFLOPS) at a clock rate of 167 MHz, the C6701 offers cost-effective solutions to high-performance DSP programming challenges. The C6701 DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. This processor has 32 general-purpose registers of 32-bit word length and eight highly independent functional units. The eight functional units provide four floating-/fixed-point ALUs, two fixed-point ALUs, and two floating-/fixed-point multipliers. The C6701 can produce two multiply-accumulates (MACs) per cycle for a total of 334 million MACs per second (MMACS). The C6701 DSP also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals.

The C6701 includes a large bank of on-chip memory and has a powerful and diverse set of peripherals. Program memory consists of a 64K-byte block that is user-configurable as cache or memory-mapped program space. Data memory consists of two 32K-byte blocks of RAM. The peripheral set includes two multichannel buffered serial ports (McBSPs), two general-purpose timers, a host-port interface (HPI), and a glueless external memory interface (EMIF) capable of interfacing to SDRAM or SBSRAM and asynchronous peripherals.

The C6701 has a complete set of development tools which includes: a new C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows™ debugger interface for visibility into source code execution.

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顶层文档	类型	标题	下载最新的英语版本		日期
*	数据表	TMS320C6701 Floating-Point DSP 数据表 (Rev. F)			2004-3-1
*	勘误表	TMS320C6701 Silicon Errata (Rev. A)			2001-1-31
	应用手册	如何将 CCS 3.x 工程迁移至最新的 Code Composer Studio™ (CCS) (Rev. A)	英语版 (Rev.A)	PDF \| HTML	2021-5-19
	应用手册	Introduction to TMS320C6000 DSP Optimization			2011-10-6
	用户指南	TMS320C6000 DSP Peripherals Overview Reference Guide (Rev. Q)			2009-7-2
	应用手册	TMS320C6000 EMIF-to-External SDRAM Interface (Rev. E)			2007-9-4
	应用手册	Thermal Considerations for the DM64xx, DM64x, and C6000 Devices			2007-5-20
	用户指南	TMS320C6000 DSP External Memory Interface (EMIF) Reference Guide (Rev. E)			2007-4-11
	用户指南	TMS320C6000 DSP Multichannel Buffered Serial Port (McBSP) Reference Guide (Rev. G)			2006-12-14
	用户指南	TMS320C67x/C67x+ DSP CPU and Instruction Set Reference Guide (Rev. A)			2006-11-7
	用户指南	TMS320C6000 DSP Host-Post Interface (HPI) Reference Guide (Rev. C)			2006-1-1
	用户指南	TMS320C6000 DSP Power-Down Logic and Modes Reference Guide (Rev. C)			2005-3-1
	用户指南	TMS320C6000 DSP 32-bit Timer Reference Guide (Rev. B)			2005-1-25
	用户指南	TMS320C620x/C670x DSP Program & Data Memory Controller/DMA Controller Ref.Guide (Rev. A)			2004-9-3
	用户指南	TMS320C6000 Chip Support Library API Reference Guide (Rev. J)			2004-8-13
	应用手册	TMS320C6000 Tools: Vector Table and Boot ROM Creation (Rev. D)			2004-4-26
	应用手册	TMS320C6000 Board Design: Considerations for Debug (Rev. C)			2004-4-21
	应用手册	TMS320C6000 McBSP Initialization (Rev. C)			2004-3-8
	用户指南	TMS320C6000 DSP Interrupt Selector Reference Guide (Rev. A)			2004-1-9
	用户指南	TMS320C6000 DSP Designing for JTAG Emulation Reference Guide			2003-7-31
	用户指南	TMS320C620x/C670x DSP Boot Modes and Configuration Reference Guide			2003-7-31
	应用手册	How to Begin Development Today w/ High Performance Floating Point TMS320C67x DSP			2003-4-23
	应用手册	Using IBIS Models for Timing Analysis (Rev. A)			2003-4-15
	用户指南	TMS320C6201/6701 Evaluation Module User's Guide (Rev. F)			2002-8-13
	应用手册	TMS320C62x/C67x Power Consumption Summary (Rev. C)			2002-7-30
	应用手册	TMS320C6000 McBSP Interface to an ST-BUS Device (Rev. B)			2002-6-4
	应用手册	TMS320C6000 HPI to PCI Interfacing Using the PLX PCI9050 (Rev. C)			2002-4-17
	应用手册	TMS320C6000 DMA Example Applications (Rev. A)			2002-4-10
	应用手册	TMS320C6000 Board Design for JTAG (Rev. C)			2002-4-2
	应用手册	TMS320C6000 Memory Test (Rev. A)			2002-2-19
	应用手册	TMS320C6000 EMIF to External Flash Memory (Rev. A)			2002-2-13
	应用手册	Using a TMS320C6000 McBSP for Data Packing (Rev. A)			2001-10-31
	应用手册	Interfacing theTMS320C6000 EMIFto a PCI Bus Using the AMCC S5933 PCI Controller (Rev. A)			2001-9-30
	应用手册	TMS320C6000 Host Port to MC68360 Interface (Rev. A)			2001-9-30
	应用手册	Using the TMS320C6000 McBSP as a High Speed Communication Port (Rev. A)			2001-8-31
	应用手册	TMS320C6000 Host Port to the i80960 Microprocessors Interface (Rev. A)			2001-8-31
	应用手册	TMS320C6000 EMIF to External Asynchronous SRAM Interface (Rev. A)			2001-8-31
	应用手册	TMS320C6000 System Clock Circuit Example (Rev. A)			2001-8-15
	应用手册	TMS320C6201/6701 EVM: TMS320C6000 McBSP to Multimedia Audio Codec (Rev. A)			2001-7-24
	应用手册	TMS320C6000 McBSP to Voice Band Audio Processor (VBAP) Interface (Rev. A)			2001-7-23
	应用手册	TMS320C6000 McBSP: AC'97 Codec Interface (TLV320AIC27) (Rev. A)			2001-7-10
	应用手册	TMS320C6000 McBSP: Interface to SPI ROM (Rev. C)			2001-6-30
	应用手册	TMS320C6000 Host Port to MPC860 Interface (Rev. A)			2001-6-21
	应用手册	TMS320C6000 McBSP: IOM-2 Interface (Rev. A)			2001-5-21
	应用手册	Circular Buffering on TMS320C6000 (Rev. A)			2000-9-12
	应用手册	TMS320C6000 McBSP as a TDM Highway (Rev. A)			2000-9-11
	应用手册	TMS320C620x/TMS3206701 DMA and CPU: Data Access Performance (Rev. A)			2000-8-16
	应用手册	TMS320C6000 u-Law and a-Law Companding with Software or the McBSP			2000-2-2
	应用手册	TMS320C6000 C Compiler: C Implementation of Intrinsics			1999-12-7
	应用手册	TMS320C6000 McBSP: I2S Interface			1999-9-8

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XDS560v2 System Trace 在其巨大的外部存储器缓冲区中加入了系统引脚跟踪。这种外部存储器缓冲区适用于指定的 TI 器件，通过捕获相关器件级信息，获得准确的总线性能活动和吞吐量，并对内核和外设进行电源管理。此外，对于带有嵌入式缓冲跟踪器 (ETB) 的所有 ARM 和 DSP 处理器，所有 XDS (...)

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TMS320C6000 数字信号处理器库 (DSPLIB) 是一款平台优化型 DSP 函数库，适用于 C 编程器。它包括 C 语言可调用的通用信号处理例程，通常用于计算密集型的实时应用中。使用这些例程可实现比等效标准 ANSI C 语言代码更高的性能。通过使用源代码提供即用型 DSP 函数，DSPLIB 可以显著缩短应用开发时间。

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C67X-MATHLIB — 用于 C67x 浮点器件的 DSP 数学库

德州仪器 (TI) 数学库是优化的浮点数学函数库，用于使用 TI 浮点器件的 C 编程器。这些例程通常用于计算密集型实时应用，最佳执行速度是这些应用的关键。通过使用这些例程（而不是在现有运行时支持中找到的例程），您可以在无需重写现有代码的情况下获得更快的执行速度。MATHLIB 库包括目前在现有实时支持库中提供的所有浮点数学例程。这些新函数可称为当前实时支持库名称或包含在数学库中的新名称。

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芯片支持库 (CSL) 提供了一个应用程序编程接口 (API)，用于配置和控制 DSP 片上外设，以实现易用性、各种 C6000 器件间的兼容性以及硬件抽象。通过提供标准化和可移植性，可缩短开发时间。特性部分列出的功能专为以下器件而设计：C6201、C6202、C6203、C6204、C6205、C6211、C6410、C6412、C6413、C6414、C6415、C6416、C6418、C6701、C6711、C6712、C6713、DA610、DM640、DM641 和 DM642。