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TLV4825

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TLV4825

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产品详情

Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.8 Vos (offset voltage at 25°C) (max) (mV) 0.004 Offset drift (typ) (µV/°C) 0.02 GBW (typ) (MHz) 3.5 Features Cost Optimized, Zero Drift Slew rate (typ) (V/µs) 1.8 Rail-to-rail In-Out Iq per channel (typ) (mA) 0.5 CMRR (typ) (dB) 120 Rating Catalog Operating temperature range (°C) -40 to 125 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.1 Input common mode headroom (to positive supply) (typ) (V) 0.1 Output swing headroom (to negative supply) (typ) (V) 0.007 Output swing headroom (to positive supply) (typ) (V) -0.007
Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.8 Vos (offset voltage at 25°C) (max) (mV) 0.004 Offset drift (typ) (µV/°C) 0.02 GBW (typ) (MHz) 3.5 Features Cost Optimized, Zero Drift Slew rate (typ) (V/µs) 1.8 Rail-to-rail In-Out Iq per channel (typ) (mA) 0.5 CMRR (typ) (dB) 120 Rating Catalog Operating temperature range (°C) -40 to 125 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.1 Input common mode headroom (to positive supply) (typ) (V) 0.1 Output swing headroom (to negative supply) (typ) (V) 0.007 Output swing headroom (to positive supply) (typ) (V) -0.007
TSSOP (PW) 14 32 mm² (5 mm × 6.4 mm) SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm)
  • Ultra-low offset drift: ±0.02µV/°C
  • Flat low frequency noise: 0.3µVPP (0.1 to 10Hz)
  • Ultra-low offset: ±4µV
  • Rail-to-rail input and output
  • Very high AOL, CMRR, PSRR: > 120dB
  • Wide input common-mode: 100mV beyond rails
  • Low input bias current: ±100pA
  • Low thermal noise floor: 15nV/√Hz
  • Wide gain bandwidth: 3.5MHz
  • High CL drive: 1nF (no sustained oscillations)
  • Low quiescent current: 500µA/channel
  • Wide supply range: 1.8V to 5.5V
  • Wide temperature range: –40°C to +125°C
  • Ultra-low offset drift: ±0.02µV/°C
  • Flat low frequency noise: 0.3µVPP (0.1 to 10Hz)
  • Ultra-low offset: ±4µV
  • Rail-to-rail input and output
  • Very high AOL, CMRR, PSRR: > 120dB
  • Wide input common-mode: 100mV beyond rails
  • Low input bias current: ±100pA
  • Low thermal noise floor: 15nV/√Hz
  • Wide gain bandwidth: 3.5MHz
  • High CL drive: 1nF (no sustained oscillations)
  • Low quiescent current: 500µA/channel
  • Wide supply range: 1.8V to 5.5V
  • Wide temperature range: –40°C to +125°C

The TLVx825 family of single, dual, and quad channel operational amplifiers enable precision performance such as lower offset, lower offset drift over temperature, greater offset stability over time and a flat noise floor. This level of performance is crucial to a variety of systems focusing on precision voltage sensing from sensors and precision current sensing using smaller shunt resistors.

TLVx825 uses zero-drift architecture to achieve an input referred offset voltage of 4µV, an offset drift of 0.02µV/°C and a low frequency noise of 320nVPP in the standard 0.1 – 10Hz range. This combination of specs provides excellent accuracy in high gain applications, thereby greatly reducing the need for system level calibration.

Additionally, with a quiescent current of 500µA, the TLVx825 is able to achieve a bandwidth of 3.5MHz and a broadband noise of 15nV/√Hz. This ability is crucial to achieve higher linearity, and signal-to-noise ratio in applications involving higher resolution, mid-speed analog to digital converters (ADCs) while minimizing system power.

The TLVx825 family of single, dual, and quad channel operational amplifiers enable precision performance such as lower offset, lower offset drift over temperature, greater offset stability over time and a flat noise floor. This level of performance is crucial to a variety of systems focusing on precision voltage sensing from sensors and precision current sensing using smaller shunt resistors.

TLVx825 uses zero-drift architecture to achieve an input referred offset voltage of 4µV, an offset drift of 0.02µV/°C and a low frequency noise of 320nVPP in the standard 0.1 – 10Hz range. This combination of specs provides excellent accuracy in high gain applications, thereby greatly reducing the need for system level calibration.

Additionally, with a quiescent current of 500µA, the TLVx825 is able to achieve a bandwidth of 3.5MHz and a broadband noise of 15nV/√Hz. This ability is crucial to achieve higher linearity, and signal-to-noise ratio in applications involving higher resolution, mid-speed analog to digital converters (ADCs) while minimizing system power.
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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 TLVx825 3.5MHz, 1.8V to 5.5V, High Precision, Zero-Drift Operational Amplifiers 数据表 (Rev. B) PDF | HTML 2026-9-22
技术文章 为每一款设计实现精密放大器性能 PDF | HTML PDF | HTML 2026-8-20

设计与开发

如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。

评估板

AMP-PDK-EVM — 放大器高性能开发套件评估模块

放大器高性能开发套件 (PDK) 是一款用于测试常见运算放大器参数的评估模块 (EVM) 套件，与大多数运算放大器和比较器均兼容。该 EVM 套件提供了一个主板，主板上具有多个插槽式子卡选项以满足封装需求，使工程师能够快速评估和验证器件性能。

AMP-PDK-EVM 套件支持五种常用的业界通用封装，包括：

  • D（SOIC-8 和 SOIC-14）
  • PW (TSSOP-14)
  • DGK (VSSOP-8)
  • DBV（SOT23-5 和 SOT23-6）
  • DCK（SC70-5 和 SC70-6）
用户指南: PDF | HTML
支持的产品和硬件
仿真模型

TLV825, TLV2825 and TLV4825 TINA-TI SPICE Model (Rev. A)

SLVMF11A.ZIP (33 KB) - TINA-TI Spice 模型
支持的产品和硬件
封装 引脚 CAD 符号、封装和 3D 模型
TSSOP (PW) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian
适用于评估类项目的 TI 标准条款与条件。

订购和质量

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