主页 逻辑和电压转换 缓冲器、驱动器和收发器 同相缓冲器和驱动器
主页
逻辑和电压转换
缓冲器、驱动器和收发器
同相缓冲器和驱动器

SN74AUP2G125

正在供货

具有三态输出的 2 通道、0.8V 至 3.6V 低功耗缓冲器

立即订购
数据表

SN74AUP2G125

正在供货
数据表 立即订购

产品详情

Technology family AUP Number of channels 2 IOL (max) (mA) 4 Supply current (max) (µA) 0.9 IOH (max) (mA) -4 Input type Standard CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
Technology family AUP Number of channels 2 IOL (max) (mA) 4 Supply current (max) (µA) 0.9 IOH (max) (mA) -4 Input type Standard CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
VSSOP (DCU) 8 6.2 mm² (2 mm × 3.1 mm) X2SON (DQE) 8 1.4 mm² (1.4 mm × 1 mm) UQFN (RSE) 8 2.25 mm² (1.5 mm × 1.5 mm) DSBGA (YFP) 8 1.8 mm² (— mm × — mm) DSBGA (YZP) 8 2.8125 mm² (— mm × — mm)
  • Available in the Texas Instruments NanoStar™ Package
  • Low Static-Power Consumption
    (ICC = 0.9 µA Max)
  • Low Dynamic-Power Consumption
    (Cpd = 4 pF Typ at 3.3 V)
  • Low Input Capacitance (CI = 1.5 pF Typ)
  • Low Noise – Overshoot and Undershoot
    <10% of VCC
  • Input-Disable Feature Allows Floating Input Conditions
  • Ioff Supports Partial-Power-Down Mode Operation
  • Input Hysteresis Allows Slow Input Transition and Better Switching
    Noise Immunity at Input
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • tpd = 5.4 ns Max at 3.3 V
  • Suitable for Point-to-Point Applications
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)

NanoStar is a trademark of Texas Instruments
  • Available in the Texas Instruments NanoStar™ Package
  • Low Static-Power Consumption
    (ICC = 0.9 µA Max)
  • Low Dynamic-Power Consumption
    (Cpd = 4 pF Typ at 3.3 V)
  • Low Input Capacitance (CI = 1.5 pF Typ)
  • Low Noise – Overshoot and Undershoot
    <10% of VCC
  • Input-Disable Feature Allows Floating Input Conditions
  • Ioff Supports Partial-Power-Down Mode Operation
  • Input Hysteresis Allows Slow Input Transition and Better Switching
    Noise Immunity at Input
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • tpd = 5.4 ns Max at 3.3 V
  • Suitable for Point-to-Point Applications
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)

NanoStar is a trademark of Texas Instruments

The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see Figure 1 and Figure 2).

The SN74AUP2G125 is a dual bus buffer gate designed for 0.8-V to 3.6-V VCC operation. This device features dual line drivers with 3-state outputs. Each output is disabled when the corresponding output-enable (OE) input is high. This device has the input-disable feature, which allows floating input signals.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see Figure 1 and Figure 2).

The SN74AUP2G125 is a dual bus buffer gate designed for 0.8-V to 3.6-V VCC operation. This device features dual line drivers with 3-state outputs. Each output is disabled when the corresponding output-enable (OE) input is high. This device has the input-disable feature, which allows floating input signals.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
filter 查找其他 同相缓冲器和驱动器
下载 观看带字幕的视频 视频

您可能感兴趣的相似产品

open-in-new 比较替代产品
功能与比较器件相同且具有相同引脚。
SN74AUC2G32 正在供货 双通道、双输入、0.8V 至 2.7V、超高速 (2.4ns) 或门 Voltage range 0.8V to 2.7V, average propagation delay 1.7ns, average drive strength 9mA
SN74AUC2G02 正在供货 2 通道、2 输入、0.8V 至 2.7V 高速或非门 Voltage range 0.8V to 2.7V, average propagation delay 1.7ns, average drive strength 9mA
SN74AUC2G126 正在供货 具有三态输出的 2 通道、0.8V 至 2.7V 高速缓冲器 Voltage range 0.8V to 2.7V, average propagation delay 1.7ns, average drive strength 9mA
SN74AUC2G125 正在供货 具有三态输出的 2 通道、0.8V 至 2.7V 高速缓冲器 Voltage range 0.8V to 2.7V, average propagation delay 1.7ns, average drive strength 9mA
SN74AUC2G241 正在供货 具有三态输出的 2 通道、0.8V 至 2.7V 高速缓冲器 Voltage range 0.8V to 2.7V, average propagation delay 1.7ns, average drive strength 9mA
SN74AUC2G240 正在供货 具有三态输出的 2 通道、0.8V 至 2.7V 高速反相器 Voltage range 0.8V to 2.7V, average propagation delay 1.7ns, average drive strength 9mA
SN74AUC2G08 正在供货 2 通道、2 输入、0.8V 至 2.7V 超高速 (2.4ns) 与门 Voltage range 0.8V to 2.7V, average propagation delay 1.7ns, average drive strength 9mA
SN74AUC2G00 正在供货 2 通道、2 输入、0.8V 至 2.7V 高速与非门 Voltage range 0.8V to 2.7V, average propagation delay 1.7ns, average drive strength 9mA
SN74LVC2G125 正在供货 具有三态输出的 2 通道、1.65V 至 5.5V 缓冲器 Voltage range 1.65V to 5.5V, average propagation delay 5.5ns, average drive strength 24mA
SN74AUC2G86 正在供货 2 通道、2 输入、0.8V 至 2.7V 高速 XOR（异或）门 Voltage range 0.8V to 2.7V, average propagation delay 1.7ns, average drive strength 9mA
SN74AUC2G80 正在供货 双通道上升沿触发 D 型触发器 Voltage range 0.8V to 2.7V, average propagation delay 1.7ns, average drive strength 9mA
功能与比较器件相似。
CD40107B 正在供货 具有开漏输出的 2 通道、2 输入、3V 至 18V 与非门 Voltage range 3V to 18V, average propagation delay 130ns

技术文档

未找到结果。请清除搜索并重试。
查看全部 2
顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 SN74AUP2G125 Low-Power Dual Bus Buffer Gate With 3-State Outputs 数据表 (Rev. D) 2010-5-18
应用简报 了解施密特触发器 (Rev. B) PDF | HTML 英语版 (Rev.B) PDF | HTML 2025-5-5

设计与开发

如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。

评估板

5-8-LOGIC-EVM — 支持 5 至 8 引脚 DCK、DCT、DCU、DRL 和 DBV 封装的通用逻辑评估模块

灵活的 EVM 设计用于支持具有 5 至 8 引脚数且采用 DCK、DCT、DCU、DRL 或 DBV 封装的任何器件。
用户指南: PDF
支持的产品和硬件
有库存
限制：
??asset.out-of-stock-ti_zh_CN??
无货
评估板

5-8-NL-LOGIC-EVM — 支持 5 至 8 引脚 DPW、DQE、DRY、DSF、DTM、DTQ 和 DTT 封装的通用逻辑和转换 EVM

通用 EVM 旨在支持采用 DTT、DRY、DPW、DTM、DQE、DQM、DSF 或 DTQ 封装的任何逻辑或转换器件。电路板设计可实现灵活的评估。

用户指南: PDF | HTML
支持的产品和硬件
有库存
限制：
??asset.out-of-stock-ti_zh_CN??
无货
仿真模型

SN74AUP2G125 Behavioral SPICE Model

SCEM676.ZIP (7 KB) - PSpice 模型
支持的产品和硬件
封装 引脚 CAD 符号、封装和 3D 模型
VSSOP (DCU) 8 Ultra Librarian
X2SON (DQE) 8 Ultra Librarian
UQFN (RSE) 8 Ultra Librarian
DSBGA (YFP) 8 Ultra Librarian
DSBGA (YZP) 8 Ultra Librarian
适用于评估类项目的 TI 标准条款与条件。

订购和质量

支持和培训

可获得 TI 工程师技术支持的 TI E2E™ 论坛

查看全部论坛主题 查看英文版全部论坛主题

所有内容均由 TI 和社区贡献者按“原样”提供，并不构成 TI 规范。请参阅使用条款。

如果您对质量、包装或订购 TI 产品有疑问，请参阅 TI 支持。​​​​​​​​​​​​​​

视频