SN74AUC2G86

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2 通道、2 输入、0.8V 至 2.7V 高速 XOR（异或）门

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数据表

document-pdfAcrobat SN74AUC2G86 数据表 (Rev. B) (英语)

SN74AUC2G86

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产品详情

Technology family

AUC

Number of channels

2

Inputs per channel

2

IOL (max) (mA)

9

Input type

Standard CMOS

IOH (max) (mA)

-9

Output type

Push-Pull

Features

High speed (tpd 10-50ns)

Data rate (max) (Mbps)

250

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Technology family

AUC

Number of channels

2

Inputs per channel

2

IOL (max) (mA)

9

Input type

Standard CMOS

IOH (max) (mA)

-9

Output type

Push-Pull

Features

High speed (tpd 10-50ns)

Data rate (max) (Mbps)

250

Rating

Catalog

Operating temperature range (°C)

-40 to 85

VSSOP (DCU)

8

6.2 mm² (2 mm × 3.1 mm)

DSBGA (YZP)

8

2.8125 mm² (— mm × — mm)

SSOP (DCT)

8

11.8 mm² (2.95 mm × 4 mm)

Available in the Texas Instruments NanoFree™ Package
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
I_off Supports Partial-Power-Down Mode Operation
Sub-1-V Operable
Max t_pd of 1.7 ns at 1.8 V
Low Power Consumption, 10-µA Max I_CC
±8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

NanoFree is a trademark of Texas Instruments.

Available in the Texas Instruments NanoFree™ Package
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
I_off Supports Partial-Power-Down Mode Operation
Sub-1-V Operable
Max t_pd of 1.7 ns at 1.8 V
Low Power Consumption, 10-µA Max I_CC
±8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

NanoFree is a trademark of Texas Instruments.

This dual 2-input exclusive-OR gate is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.65-V to 1.95-V V_CC operation.

The SN74AUC2G86 performs the Boolean function Y = B or Y = AB + AB in positive logic.

A common application is as a true/complement element. If the input is low, the other input is reproduced in true form at the output. If the input is high, the signal on the other input is reproduced inverted at the output.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This dual 2-input exclusive-OR gate is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.65-V to 1.95-V V_CC operation.

The SN74AUC2G86 performs the Boolean function Y = B or Y = AB + AB in positive logic.

A common application is as a true/complement element. If the input is low, the other input is reproduced in true form at the output. If the input is high, the signal on the other input is reproduced inverted at the output.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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