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LVDS、M-LVDS 和 PECL IC

SN65EL16

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5.0V ECL 差动缓冲器

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数据表

SN65EL16

正在供货
数据表 立即订购

产品详情

Function Buffer Protocols ECL, NECL, PECL Number of transmitters 1 Number of receivers 1 Signaling rate (Mbps) 3500 Input signal ECL, NECL Output signal ECL Rating Catalog Operating temperature range (°C) -40 to 85
Function Buffer Protocols ECL, NECL, PECL Number of transmitters 1 Number of receivers 1 Signaling rate (Mbps) 3500 Input signal ECL, NECL Output signal ECL Rating Catalog Operating temperature range (°C) -40 to 85
VSSOP (DGK) 8 14.7 mm² (3 mm × 4.9 mm) SOIC (D) 8 29.4 mm² (4.9 mm × 6 mm)
  • Differential PECL/NECL Receiver
  • Operating Range
    • PECL: VCC = 4.2 V to 5.7 V With VEE = 0 V
    • NECL: VCC = 0 V With VEE = -4.2 V to -5.7 V
  • 250-ps Propagation Delay
  • Support for Clock Frequencies >2 GHz
  • Deterministic Output Value for Open Input Conditions
  • Built-In Temperature Compensation
  • Drop-In Compatible With MC10EL16, MC100EL16
  • Built-In Input Pulldown Resistors
  • APPLICATIONS
    • Data and Clock Transmission Over Backplane
  • Differential PECL/NECL Receiver
  • Operating Range
    • PECL: VCC = 4.2 V to 5.7 V With VEE = 0 V
    • NECL: VCC = 0 V With VEE = -4.2 V to -5.7 V
  • 250-ps Propagation Delay
  • Support for Clock Frequencies >2 GHz
  • Deterministic Output Value for Open Input Conditions
  • Built-In Temperature Compensation
  • Drop-In Compatible With MC10EL16, MC100EL16
  • Built-In Input Pulldown Resistors
  • APPLICATIONS
    • Data and Clock Transmission Over Backplane

The SN65EL16 is a differential PECL/ECL receiver with PECL/ECL output. The device includes circuitry to hold Q to a low logic level when the inputs are in an open condition.

The VBB pin is a reference voltage output for the device. When the device is used in the single-ended mode, the unused input should be tied to VBB. This reference voltage can also be used to bias the input when it is ac coupled. When the VBB pin is used, place a 0.01-µF decoupling capacitor between VCC and VBB. Also, limit the sink/source current to <0.5 mA to VBB. Leave VBB open when it is not used.

The SN65EL11 is housed in an industry-standard SOIC-8 package and is also available in a TSSOP-8 package.

The SN65EL16 is a differential PECL/ECL receiver with PECL/ECL output. The device includes circuitry to hold Q to a low logic level when the inputs are in an open condition.

The VBB pin is a reference voltage output for the device. When the device is used in the single-ended mode, the unused input should be tied to VBB. This reference voltage can also be used to bias the input when it is ac coupled. When the VBB pin is used, place a 0.01-µF decoupling capacitor between VCC and VBB. Also, limit the sink/source current to <0.5 mA to VBB. Leave VBB open when it is not used.

The SN65EL11 is housed in an industry-standard SOIC-8 package and is also available in a TSSOP-8 package.
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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 5.0 V ECL Differential Receiver 数据表 2008-6-12
应用手册 AC Coupling Between Differential LVPECL, LVDS, HSTL and CML (Rev. C) 2007-10-17

设计与开发

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仿真模型

SN65EL16 IBIS Model Version 1.0

SLLM050.ZIP (15 KB) - IBIS 模型
支持的产品和硬件
封装 引脚 CAD 符号、封装和 3D 模型
VSSOP (DGK) 8 Ultra Librarian
SOIC (D) 8 Ultra Librarian
适用于评估类项目的 TI 标准条款与条件。

订购和质量

支持和培训

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