LP38841-ADJ
- Ideal for Conversion from 1.8V or 1.5V Inputs
- Designed for Use with Low ESR Ceramic Capacitors
- Ultra Low Dropout Voltage (75mV @ 0.8A Typ)
- 0.56V to 1.5V Adjustable Output Range
- Load Regulation of 0.1%/A (Typ)
- 30nA Quiescent Current in Shutdown (Typ)
- Low Ground Pin Current at all Loads
- Over Temperature/Over Current Protection
- Available in 8 Lead SO
- −40°C to +125°C Junction Temperature Range
- UVLO Disables Output when VBIAS < 3.8V
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The LP38841-ADJ is a high current, fast response regulator which can maintain output voltage regulation with minimum input to output voltage drop. Fabricated on a CMOS process, the device operates from two input voltages: Vbias provides voltage to drive the gate of the N-MOS power transistor, while Vin is the input voltage which supplies power to the load. The use of an external bias rail allows the part to operate from ultra low Vin voltages. Unlike bipolar regulators, the CMOS architecture consumes extremely low quiescent current at any output load current. The use of an N-MOS power transistor results in wide bandwidth, yet minimum external capacitance is required to maintain loop stability.
The fast transient response of these devices makes them suitable for use in powering DSP, Microcontroller Core voltages and Switch Mode Power Supply post regulators. The parts are available in the SO package.
Dropout Voltage: 75 mV (typ) @ 0.8A load current.
Quiescent Current: 30 mA (typ) at full load.
Shutdown Current: 30 nA (typ) when S/D pin is low.
Precision Reference Voltage: 1.5% room temperature accuracy.
技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | LP38841-ADJ 0.8A Ultra Low Drpout Adj Lnr Reg Stable w/Ceramic Output Caps 数据表 (Rev. C) | 2013-4-2 |
设计与开发
如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。
| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| HSOIC (DDA) | 8 | Ultra Librarian |