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LM5041B

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具有参考引脚禁用选项的级联 PWM 控制器

产品详情

Topology Push pull Control mode Current Features Current limiting, Programmable soft start, Synchronization pin Duty cycle (max) (%) 50
Topology Push pull Control mode Current Features Current limiting, Programmable soft start, Synchronization pin Duty cycle (max) (%) 50
TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm)

  • Internal Start-up Bias Regulator
  • Programmable Line Under-Voltage Lockout (UVLO) with Adjustable Hysteresis
  • Current Mode Control
  • Internal Error Amplifier with Reference
  • Cycle-by-cycle Over-Current Protection
  • Leading Edge Blanking
  • Programmable Push-Pull Overlap or Dead Time
  • Internal 1.5A Push-Pull Gate Drivers
  • Programmable Soft-Start
  • Programmable Oscillator with Sync Capability
  • Precision Reference
  • Thermal Shutdown

  • Internal Start-up Bias Regulator
  • Programmable Line Under-Voltage Lockout (UVLO) with Adjustable Hysteresis
  • Current Mode Control
  • Internal Error Amplifier with Reference
  • Cycle-by-cycle Over-Current Protection
  • Leading Edge Blanking
  • Programmable Push-Pull Overlap or Dead Time
  • Internal 1.5A Push-Pull Gate Drivers
  • Programmable Soft-Start
  • Programmable Oscillator with Sync Capability
  • Precision Reference
  • Thermal Shutdown

  • The LM5041B PWM controller contains all of the features necessary to implement either current-fed or voltage-fed push-pull or bridge power converters. These “Cascaded” topologies are well suited for multiple output and higher power applications. The LM5041B includes these four control outputs: the buck stage controls (HD and LD) and the push-pull control outputs (PUSH and PULL). Push-pull outputs are driven at 50% nominal duty cycle at one half of the switching frequency of the buck stage and can be configured for either a guaranteed overlap time (for current-fed applications) or a guaranteed non-overlap time (for voltage-fed applications). Push-pull stage MOSFETs can be driven directly from the internal gate drivers while the buck stage requires an external driver such as the LM5102. The LM5041B includes a high-voltage start-up regulator that operates over a wide input range of 15V to 100V. The PWM controller is designed for high-speed capability including an oscillator frequency range up to 1 MHz and total propagation delays of less than 100 ns. Additional features include line Under-Voltage Lock-Out (UVLO), Soft-Start, an error amplifier, precision voltage reference, and thermal shutdown.

    The differences between LM5041, LM5041A and LM5041B are as follows: In the LM5041A and the LM5041B version, the hiccup mode over-current protection is not employed and the VCC bias regulator is not disabled by a low state at the SS pin. In the LM5041B version, both the high and low side buck stage gate drivers are forced to a low state when the controller is disabled. In the LM5041 and the LM5041B version, the buck stage controller is disabled by either a low state at the UVLO pin or a low state at the SS pin. Also in the LM5041B version, the REF pin 5V regulator is not disabled by a UVLO pin low state.


    The LM5041B PWM controller contains all of the features necessary to implement either current-fed or voltage-fed push-pull or bridge power converters. These “Cascaded” topologies are well suited for multiple output and higher power applications. The LM5041B includes these four control outputs: the buck stage controls (HD and LD) and the push-pull control outputs (PUSH and PULL). Push-pull outputs are driven at 50% nominal duty cycle at one half of the switching frequency of the buck stage and can be configured for either a guaranteed overlap time (for current-fed applications) or a guaranteed non-overlap time (for voltage-fed applications). Push-pull stage MOSFETs can be driven directly from the internal gate drivers while the buck stage requires an external driver such as the LM5102. The LM5041B includes a high-voltage start-up regulator that operates over a wide input range of 15V to 100V. The PWM controller is designed for high-speed capability including an oscillator frequency range up to 1 MHz and total propagation delays of less than 100 ns. Additional features include line Under-Voltage Lock-Out (UVLO), Soft-Start, an error amplifier, precision voltage reference, and thermal shutdown.

    The differences between LM5041, LM5041A and LM5041B are as follows: In the LM5041A and the LM5041B version, the hiccup mode over-current protection is not employed and the VCC bias regulator is not disabled by a low state at the SS pin. In the LM5041B version, both the high and low side buck stage gate drivers are forced to a low state when the controller is disabled. In the LM5041 and the LM5041B version, the buck stage controller is disabled by either a low state at the UVLO pin or a low state at the SS pin. Also in the LM5041B version, the REF pin 5V regulator is not disabled by a UVLO pin low state.


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    顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
    * 数据表 LM5041B Cascaded PWM Controller 数据表 2009-5-1
    应用手册 DC - DC Converter Featuring the Cascaded Power Converter Topology 2007-3-21
    白皮书 Communications System Power Supply Designs 2004-1-1

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    TSSOP (PW) 16 Ultra Librarian

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