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LM25115

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42V、次级侧后置稳压器同步降压控制器

产品详情

Rating Catalog Topology Buck Controller Vin (max) (V) 42 Vin (min) (V) 4.5 Vout (max) (V) 13.5 Vout (min) (V) 0.75 Control mode Voltage mode, current mode Features Frequency synchronization Duty cycle (max) (%) 85 Number of phases 1 Operating temperature range (°C) -40 to 125
Rating Catalog Topology Buck Controller Vin (max) (V) 42 Vin (min) (V) 4.5 Vout (max) (V) 13.5 Vout (min) (V) 0.75 Control mode Voltage mode, current mode Features Frequency synchronization Duty cycle (max) (%) 85 Number of phases 1 Operating temperature range (°C) -40 to 125
WSON (NHQ) 16 25 mm² (5 mm × 5 mm) TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm)
  • Self-synchronization to Main Channel Output
  • Free-run Mode for Buck Regulation of DC Input
  • Leading Edge Pulse Width Modulation
  • Voltage-mode Control with Current Injection and Input Line Feed-forward
  • Operates from AC or DC Input up to 42V
  • Wide 4.5V to 30V Bias Supply Range
  • Wide 0.75V to 13.5V Output Range.
  • Top and Bottom Gate Drivers Sink 2.5A Peak
  • Adaptive Gate Driver Dead-time Control
  • Wide Bandwidth Error Amplifier (4MHz)
  • Programmable Soft-start
  • Thermal Shutdown Protection
  • TSSOP-16 or Thermally Enhanced WSON-16 Packages

All trademarks are the property of their respective owners.

  • Self-synchronization to Main Channel Output
  • Free-run Mode for Buck Regulation of DC Input
  • Leading Edge Pulse Width Modulation
  • Voltage-mode Control with Current Injection and Input Line Feed-forward
  • Operates from AC or DC Input up to 42V
  • Wide 4.5V to 30V Bias Supply Range
  • Wide 0.75V to 13.5V Output Range.
  • Top and Bottom Gate Drivers Sink 2.5A Peak
  • Adaptive Gate Driver Dead-time Control
  • Wide Bandwidth Error Amplifier (4MHz)
  • Programmable Soft-start
  • Thermal Shutdown Protection
  • TSSOP-16 or Thermally Enhanced WSON-16 Packages

All trademarks are the property of their respective owners.

The LM25115 controller contains all of the features necessary to implement multiple output power converters utilizing the Secondary Side Post Regulation (SSPR) technique. The SSPR technique develops a highly efficient and well regulated auxiliary output from the secondary side switching waveform of an isolated power converter. Regulation of the auxiliary output voltage is achieved by leading edge pulse width modulation (PWM) of the main channel duty cycle. Leading edge modulation is compatible with either current mode or voltage mode control of the main output. The LM25115 drives external high side and low side NMOS power switches configured as a synchronous buck regulator. A current sense amplifier provides overload protection and operates over a wide common mode input range. Additional features include a low dropout (LDO) bias regulator, error amplifier, precision reference, adaptive dead time control of the gate signals and thermal shutdown.

The LM25115 controller contains all of the features necessary to implement multiple output power converters utilizing the Secondary Side Post Regulation (SSPR) technique. The SSPR technique develops a highly efficient and well regulated auxiliary output from the secondary side switching waveform of an isolated power converter. Regulation of the auxiliary output voltage is achieved by leading edge pulse width modulation (PWM) of the main channel duty cycle. Leading edge modulation is compatible with either current mode or voltage mode control of the main output. The LM25115 drives external high side and low side NMOS power switches configured as a synchronous buck regulator. A current sense amplifier provides overload protection and operates over a wide common mode input range. Additional features include a low dropout (LDO) bias regulator, error amplifier, precision reference, adaptive dead time control of the gate signals and thermal shutdown.

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 LM25115 Secondary Side Post Regulator Controller 数据表 (Rev. A) 2013-4-1
白皮书 Valuing wide VIN, low EMI synchronous buck circuits for cost-driven, demanding a (Rev. A) 2019-4-10
选择指南 电源管理指南 2018 2018-7-31
模拟设计期刊 Reduce buck-converter EMI and voltage stress by minimizing inductive parasitics 2016-7-21
应用手册 Minimizing FET Losses For a High Input Rail Buck Converter (Rev. A) 2013-4-23
用户指南 Application Note 1542 LM5115A Evaluation Board (cn) 2007-3-17
用户指南 Application Note 1367 LM5115 HV DC Evaluation Board (cn) 2005-10-18

设计与开发

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仿真模型

LM25115 Unencrypted PSpice Transient Model

SNVM861.ZIP (5 KB) - PSpice 模型
支持的产品和硬件
仿真模型

LM25115 Unencrypted PSpice Transient Model Package (Rev. A)

SNVM511A.ZIP (56 KB) - PSpice 模型
支持的产品和硬件
封装 引脚 CAD 符号、封装和 3D 模型
WSON (NHQ) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian

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