DS91M040

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125MHz 四路 M-LVDS 收发器

产品详情

Function Transceiver Protocols BLVDS, CML, LVDS, LVPECL, M-LVDS Number of transmitters 4 Number of receivers 4 Signaling rate (Mbps) 250 Input signal BLVDS, CML, LVCMOS, LVDS, LVPECL, LVTTL, M-LVDS Output signal LVCMOS, LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Transceiver Protocols BLVDS, CML, LVDS, LVPECL, M-LVDS Number of transmitters 4 Number of receivers 4 Signaling rate (Mbps) 250 Input signal BLVDS, CML, LVCMOS, LVDS, LVPECL, LVTTL, M-LVDS Output signal LVCMOS, LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
WQFN (RTV) 32 25 mm² (5 mm × 5 mm)
  • DC - 125 MHz / 250 Mbps Low Jitter, Low Skew, Low Power Operation
  • Wide Input Common Mode Voltage Range Allows up to ±1V of GND Noise
  • Conforms to TIA/EIA-899 M-LVDS Standard
  • Pin Selectable M-LVDS Receiver Type (1 or 2)
  • Controlled Transition Times (2.0 ns typ) Minimize Reflections
  • 8 kV ESD on M-LVDS I/O pins protects adjoining components
  • Flow-Through Pinout Simplifies PCB Layout
  • Small 5 mm x 5 mm WQFN-32 Space Saving Package

All trademarks are the property of their respective owners.

  • DC - 125 MHz / 250 Mbps Low Jitter, Low Skew, Low Power Operation
  • Wide Input Common Mode Voltage Range Allows up to ±1V of GND Noise
  • Conforms to TIA/EIA-899 M-LVDS Standard
  • Pin Selectable M-LVDS Receiver Type (1 or 2)
  • Controlled Transition Times (2.0 ns typ) Minimize Reflections
  • 8 kV ESD on M-LVDS I/O pins protects adjoining components
  • Flow-Through Pinout Simplifies PCB Layout
  • Small 5 mm x 5 mm WQFN-32 Space Saving Package

All trademarks are the property of their respective owners.

The DS91M040 is a quad M-LVDS transceiver designed for driving / receiving clock or data signals to / from up to four multipoint networks.

M-LVDS (Multipoint LVDS) is a new family of bus interface devices based on LVDS technology specifically designed for multipoint and multidrop cable and backplane applications. It differs from standard LVDS in providing increased drive current to handle double terminations that are required in multi-point applications. Controlled transition times minimize reflections that are common in multipoint configurations due to unterminated stubs. M-LVDS devices also have a very large input common mode voltage range for additional noise margin in heavily loaded and noisy backplane environments.

A single DS91M040 channel is a half-duplex transceiver that accepts LVTTL/LVCMOS signals at the driver inputs and converts them to differential M-LVDS signal levels. The receiver inputs accept low voltage differential signals (LVDS, BLVDS, M-LVDS, LVPECL and CML) and convert them to 3V LVCMOS signals. The DS91M040 supports both M-LVDS type 1 and type 2 receiver inputs.

The DS91M040 is a quad M-LVDS transceiver designed for driving / receiving clock or data signals to / from up to four multipoint networks.

M-LVDS (Multipoint LVDS) is a new family of bus interface devices based on LVDS technology specifically designed for multipoint and multidrop cable and backplane applications. It differs from standard LVDS in providing increased drive current to handle double terminations that are required in multi-point applications. Controlled transition times minimize reflections that are common in multipoint configurations due to unterminated stubs. M-LVDS devices also have a very large input common mode voltage range for additional noise margin in heavily loaded and noisy backplane environments.

A single DS91M040 channel is a half-duplex transceiver that accepts LVTTL/LVCMOS signals at the driver inputs and converts them to differential M-LVDS signal levels. The receiver inputs accept low voltage differential signals (LVDS, BLVDS, M-LVDS, LVPECL and CML) and convert them to 3V LVCMOS signals. The DS91M040 supports both M-LVDS type 1 and type 2 receiver inputs.

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技术文档

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 DS91M040 125 MHz Quad M-LVDS Transceiver 数据表 (Rev. M) 2013-4-16
应用简报 How Far, How Fast Can You Operate MLVDS? 2018-8-6
应用手册 Designing an ATCA Compliant M-LVDS Clock Distribution Network (Rev. B) 2013-4-26
应用手册 Introduction to M-LVDS (TIA/EIA-899) (Rev. A) 2013-1-3
用户指南 SMA to RJ45 Adapter Board User Guide 2012-1-26
应用手册 Designing an ATCA Compliant M-LVDS Clock Distribution Network (cn) 2007-11-20

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评估板

DS91M040EVK — 125 MHz 四路 M-LVDS 收发器评估板

The DS91M040EVK is an evaluation board design for demonstration of all features and functions of the DS91M040. The DS91M040 is a high-speed quad M-LVDS differential transceiver designed for multipoint applications with multiple drivers or receivers. The device conforms to TIA/EIA-899 standard. It (...)

用户指南: PDF
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接口适配器

SMA2RJ45EVK — SMA 至 RJ45 适配器板

The SMA2RJ45EVK is an SMA connector to RJ45 connector adapter boards developed to complement Texas Instruments' evaluation boards for which evaluation with CAT5e cable assemblies may be desirable (such as the DriveCable02EVK, LVDS-18B-EVK, DS25BR100EVK, and others).

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仿真模型

DS91M040 IBIS Model

SNLM032.ZIP (47 KB) - IBIS 模型
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WQFN (RTV) 32 Ultra Librarian

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