DS90C402
- Ultra Low Power Dissipation
- Operates above 155.5 Mbps
- Standard TIA/EIA-644
- 8 Lead SOIC Package saves PCB space
- VCM ±1V center around 1.2V
- ±100 mV Receiver Sensitivity
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The DS90C402 is a dual receiver device optimized for high data rate and low power applications. This device along with the DS90C401 provides a pair chip solution for a dual high speed point-to-point interface. The device is in a PCB space saving 8 lead small outline package. The receiver offers ±100 mV threshold sensitivity, in addition to common-mode noise protection.
技术文档
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| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | DS90C402 Dual Low Voltage Differential Signaling (LVDS) Receiver 数据表 (Rev. C) | 2013-4-22 | |||
| 应用手册 | Capacitive Touch Design Flow for MSP430™ MCUs With CapTIvate™ Technology (Rev. B) | PDF | HTML | 2019-8-14 | |||
| 应用简报 | How Far, How Fast Can You Operate LVDS Drivers and Receivers? | 2018-8-3 | ||||
| 应用手册 | An Overview of LVDS Technology | 1998-10-5 |
设计与开发
如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。
| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| SOIC (D) | 8 | Ultra Librarian |
订购和质量
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