DS90C031QML-SP

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产品详情

Function Driver Protocols LVDS Number of transmitters 4 Number of receivers 0 Signaling rate (Mbps) 155.5 Input signal TTL Output signal LVDS Rating Space Operating temperature range (°C) -55 to 125
Function Driver Protocols LVDS Number of transmitters 4 Number of receivers 0 Signaling rate (Mbps) 155.5 Input signal TTL Output signal LVDS Rating Space Operating temperature range (°C) -55 to 125
CFP (NAC) 16 62.9285 mm² (— mm × — mm) DIESALE (Y) — See data sheet CFP (NAD) 16 62.9285 mm² (— mm × — mm)
  • Radiation guaranteed 100 krad(Si)
  • High impedance LVDS outputs with power-off
  • ±350 mV differential signaling
  • Low power dissipation
  • Low differential skew
  • Low propagation delay
  • Pin compatible with DS26C31
  • Compatible with IEEE 1596.3 SCI LVDS standard
  • Compatible with proposed TIA LVDS standard
  • Fail safe logic for floating inputs

All trademarks are the property of their respective owners.

  • Radiation guaranteed 100 krad(Si)
  • High impedance LVDS outputs with power-off
  • ±350 mV differential signaling
  • Low power dissipation
  • Low differential skew
  • Low propagation delay
  • Pin compatible with DS26C31
  • Compatible with IEEE 1596.3 SCI LVDS standard
  • Compatible with proposed TIA LVDS standard
  • Fail safe logic for floating inputs

All trademarks are the property of their respective owners.

The DS90C031 is a quad CMOS differential line driver designed for applications requiring ultra low power dissipation and high data rates.

The  DS90C031 accepts TTL/CMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition the driver supports a TRI-STATE function that may be used to disable the output stage, thus dropping the device to a low idle power state of 11 mW typical.

In addition, the DS90C031 provides power-off high impedance LVDS outputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present. The DS90C031 and companion line receiver (DS90C032) provide a new alternative to high power psuedo-ECL devices for high speed point-to-point interface applications.

The DS90C031 is a quad CMOS differential line driver designed for applications requiring ultra low power dissipation and high data rates.

The  DS90C031 accepts TTL/CMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition the driver supports a TRI-STATE function that may be used to disable the output stage, thus dropping the device to a low idle power state of 11 mW typical.

In addition, the DS90C031 provides power-off high impedance LVDS outputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present. The DS90C031 and companion line receiver (DS90C032) provide a new alternative to high power psuedo-ECL devices for high speed point-to-point interface applications.

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技术文档

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 DS90C031QML LVDS Quad CMOS Differential Line Driver 数据表 (Rev. B) 2013-3-4
* 辐射与可靠性报告 DS90C031xRQMLV TID Report 2012-5-9
* 辐射与可靠性报告 DS90C031xRQMLV SEE Report 2012-5-9
* SMD DS90C031QML-SP SMD 5962-95833 2016-6-21
选择指南 TI Space Products (Rev. L) 2026-3-27
应用简报 经 DLA 批准的 QML 产品优化 (Rev. C) PDF | HTML 英语版 (Rev.C) PDF | HTML 2025-8-18
应用手册 重离子轨道环境单粒子效应估算 (Rev. B) PDF | HTML 英语版 (Rev.B) PDF | HTML 2025-7-7
更多文献资料 TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. B) 2025-2-20
应用手册 单粒子效应置信区间计算 (Rev. A) PDF | HTML 英语版 (Rev.A) PDF | HTML 2022-12-2
应用简报 How Far, How Fast Can You Operate LVDS Drivers and Receivers? 2018-8-3
应用简报 How to Terminate LVDS Connections with DC and AC Coupling 2018-5-16
应用手册 AN-1110 LVDS Quad Dynamic I CC vs Frequency 2004-5-15

设计与开发

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仿真模型

DS90C031 IBIS Model

SNLM075.ZIP (4 KB) - IBIS 模型
支持的产品和硬件
封装 引脚 CAD 符号、封装和 3D 模型
CFP (NAC) 16 Ultra Librarian
DIESALE (Y) — Ultra Librarian
CFP (NAD) 16 Ultra Librarian

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