DS80EP100

正在供货

适用于背板和电缆的 5 至 12.5Gbps 省电均衡器

产品详情

Function Equalizer Protocols CML, LVDS, LVPECL Number of transmitters 1 Number of receivers 1 Signaling rate (Mbps) 12500 Input signal CML, LVDS, LVPECL Output signal CML, LVDS, LVPECL Rating Catalog Operating temperature range (°C) -40 to 85
Function Equalizer Protocols CML, LVDS, LVPECL Number of transmitters 1 Number of receivers 1 Signaling rate (Mbps) 12500 Input signal CML, LVDS, LVPECL Output signal CML, LVDS, LVPECL Rating Catalog Operating temperature range (°C) -40 to 85
WSON (NGF) 6 5.5 mm² (2.5 mm × 2.2 mm)
  • 5 to 12.5 Gbps Operation
  • No Power or Ground Required
  • Equalization Effective Anywhere in Data Path
  • Equalizes CML, LV-PECL, LVDS Signals
  • Symmetric I/O Structures Provide Equal Boost for Bi-directional Operation
  • 7 dB Maximum Boost
  • Code Independent, 8b/10b or Scrambled
  • Supports Both Bi-level and Multi-level Signaling
  • Extends Reach Over Backplanes and Cables
  • Compatible with PCI-Express Gen1 and Gen2
  • Compatible with XAUI
  • Will Operate in Series with Existing Active Equalizer
  • Easy to Handle 6 Pin WSON

All trademarks are the property of their respective owners.

  • 5 to 12.5 Gbps Operation
  • No Power or Ground Required
  • Equalization Effective Anywhere in Data Path
  • Equalizes CML, LV-PECL, LVDS Signals
  • Symmetric I/O Structures Provide Equal Boost for Bi-directional Operation
  • 7 dB Maximum Boost
  • Code Independent, 8b/10b or Scrambled
  • Supports Both Bi-level and Multi-level Signaling
  • Extends Reach Over Backplanes and Cables
  • Compatible with PCI-Express Gen1 and Gen2
  • Compatible with XAUI
  • Will Operate in Series with Existing Active Equalizer
  • Easy to Handle 6 Pin WSON

All trademarks are the property of their respective owners.

TI’s Power-saver equalizer compensates for transmission medium losses and minimizes medium-induced deterministic jitter. Performance is guaranteed over the full range of 5 to 12.5 Gbps. The DS80EP100 requires no power to operate. The equalizer operates anywhere in the data path to minimize media-induced deterministic jitter in both FR4 traces and cable applications. Symmetric I/O structures support full duplex or half duplex applications. Linear compensation is provided independent of line coding or protocol. The device is ideal for both bi-level and multi-level signaling.

The equalizer is available in a 6 pin leadless WSON package with a space saving 2.2 mm X 2.5 mm footprint. This tiny package provides maximum flexibility in placement and routing of the Power-saver equalizer.

TI’s Power-saver equalizer compensates for transmission medium losses and minimizes medium-induced deterministic jitter. Performance is guaranteed over the full range of 5 to 12.5 Gbps. The DS80EP100 requires no power to operate. The equalizer operates anywhere in the data path to minimize media-induced deterministic jitter in both FR4 traces and cable applications. Symmetric I/O structures support full duplex or half duplex applications. Linear compensation is provided independent of line coding or protocol. The device is ideal for both bi-level and multi-level signaling.

The equalizer is available in a 6 pin leadless WSON package with a space saving 2.2 mm X 2.5 mm footprint. This tiny package provides maximum flexibility in placement and routing of the Power-saver equalizer.

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DS38EP100 正在供货 适用于背板和电缆的 1 到 5Gbps 省电均衡器 Lower signaling rate (5000Mbps)

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 DS80EP100 5 to 12.5 Gbps, Power-Saver Equalizer for Backplanes and Cables 数据表 (Rev. C) 2013-2-19

设计与开发

如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。

仿真模型

DS80EP100 S-Parameter Model

SNLM274.ZIP (25 KB) - S 参数模型
支持的产品和硬件
封装 引脚 CAD 符号、封装和 3D 模型
WSON (NGF) 6 Ultra Librarian

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