DS26F32MQML-SP
- Input Voltage Range of ±7.0V (Differential or Common Mode) ±0.2V Sensitivity over the Input Voltage Range
- High Input Impedance
- Operation from Single +5.0V Supply
- Input Pull-Down Resistor Prevents Output Oscillation on Unused Channels
- TRI-STATE Outputs, with Choice of Complementary Enables, for Receiving Directly onto a Data Bus
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The DS26F32 is a quad differential line receiver designed to meet the requirements of EIA Standards RS-422 and RS-423, and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission.
The DS26F32 offers improved performance due to the use of state-of-the-art L-FAST bipolar technology. The L-FAST technology allows for higher speeds and lower currents by utilizing extremely short gate delay times. Thus, the DS26F32 features lower power, extended temperature range, and improved specifications.
The device features an input sensitivity of 200 mV over the input common mode range of ±7.0V. The DS26F32 provides an enable function common to all four receivers and TRI-STATE outputs with 8.0 mA sink capability. Also, a fail-safe input/output relationship keeps the outputs high when the inputs are open.
The DS26F32 offers optimum performance when used with the DS26F31 Quad Differential Line Driver.
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技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | DS26F32MQML Quad Differential Line Receivers 数据表 (Rev. A) | 2013-4-15 | |||
| * | 辐射与可靠性报告 | DS26F32MQML-SP - Total Ionizing Dose (TID) Report | 2012-5-9 | |||
| * | SMD | DS26F32MQML-SP SMD 5962R7802005VFA | 2016-6-21 | |||
| 选择指南 | TI Space Products (Rev. L) | 2026-3-27 | ||||
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| 应用手册 | 单粒子效应置信区间计算 (Rev. A) | PDF | HTML | 英语版 (Rev.A) | PDF | HTML | 2022-12-2 | |
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| 应用手册 | AN-903 A Comparison of Differential Termination Techniques (Rev. B) | 2013-4-26 |
设计与开发
如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。
| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| CFP (NAD) | 16 | Ultra Librarian |
| CDIP (NFE) | 16 | Ultra Librarian |
订购和质量
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