ADS7263
- Eight Pseudo- or Four Fully-Differential Inputs
- Simultaneous Sampling of Two Channels
- Excellent AC Performance:
- SNR:
93 dB (ADS8363)
85 dB (ADS7263)
73 dB (ADS7223) - THD:
–98 dB (ADS8363)
–92 dB (ADS7263)
–86 dB (ADS7223)
- SNR:
- Dual Programmable and Buffered 2.5-V Reference Allows:
- Two Different Input Voltage Range Settings
- Two-Level PGA Implementation
- Programmable Auto-Sequencer
- Integrated Data Storage (up to 4 per channel) for Oversampling Applications
- 2-Bit Counter for Safety Applications
- Fully Specified Over the Extended Industrial Temperature Range: –40°C to +125°C
The ADS8363 is a dual, 16-bit, 1-MSPS analog-to-digital converter (ADC) with eight pseudo- or four fully-differential input channels grouped into two pairs for simultaneous signal acquisition. The analog inputs are maintained differentially to the input of the ADC. The input multiplexer can be used in either pseudo-differential mode, supporting up to four channels per ADC (4x2), or in fully-differential mode that allows to convert up to two inputs per ADC (2x2). The ADS7263 is a 14-bit version and the ADS7223 is a 12-bit version of the ADS8363.
The ADS8363, ADS7263, and ADS7223 offer two programmable reference outputs, flexible supply voltage ranges, a programmable auto-sequencer, data storage of up to four conversion results per channel, and several power-down features.
All devices are offered in a 5-mm x 5-mm, 32-pin VQFN package.
技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | ADSxxx3 Dual, 1-MSPS, 16-, 14-, and 12-Bit, 4×2 or 2×2 Channel, Simultaneous Sampling Analog-to-Digital Converter 数据表 (Rev. D) | PDF | HTML | 2017-9-2 | ||
| 应用简报 | 伺服驱动器中的精密 ADC (Rev. A) | PDF | HTML | 英语版 (Rev.A) | PDF | HTML | 2025-11-19 | |
| 产品概述 | 适用于电机编码器和位置感应的精密 ADC (Rev. A) | PDF | HTML | 英语版 (Rev.A) | PDF | HTML | 2025-11-17 | |
| 电子书 | Best of Baker's Best: Precision Data Converters -- SAR ADCs | 2015-5-21 | ||||
| 应用手册 | Interfacing to the ADS8363 Pseudo-Differential Operating Mode | 2014-8-4 | ||||
| 应用手册 | Using the Sequencer and Pseudo-Differential Features of the ADS8363 | 2014-5-21 | ||||
| 应用手册 | Determining Minimum Acquisition Times for SAR ADCs, part 2 | 2011-3-17 | ||||
| 应用手册 | Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) | 2010-11-10 |
设计与开发
如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。
ADS8363EVM — ADS8363 评估模块
ADS8363EVM 采用了电路板指定的 ADS72-8363EVM。此 EVM 板将可插接 ADS7263(12 位)或 ADS8363(16 位)ADC。此评估板有两个 1MSPS、12 位/16 位串行输出通道。模拟输入可以配置为 4 个伪差动或 2 个全差动通道对。此功能提供了总计 8 个伪差动输入或 4 个全差动输入。
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
模拟工程师计算器旨在加快模拟电路设计工程师经常运用的许多重复性计算。该基于 PC 的工具提供图形界面,其中显示各种常见计算列表,从使用反馈电阻器设置运算放大器增益到选择合适的电路设计元件,以稳定模数转换器 (ADC) 驱动器缓冲器电路。
除了可用作独立工具之外,该计算器还能很好地与模拟工程师口袋参考中所述的概念配合使用。
ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.
| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| VQFN (RHB) | 32 | Ultra Librarian |
订购和质量
推荐产品可能包含与 TI 此产品相关的参数、评估模块或参考设计。