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参数

Rating Catalog open-in-new 查找其它 C5000 低功率 DSP

封装|引脚|尺寸

LQFP (PBK) 128 256 mm² 16 x 16 LQFP (PGE) 144 484 mm² 22 x 22 open-in-new 查找其它 C5000 低功率 DSP

特性

  • Advanced Multibus Architecture With Three Separate 16-Bit Data Memory Buses and One Program Memory Bus
  • 40-Bit Arithmetic Logic Unit (ALU) Including a 40-Bit Barrel Shifter and Two Independent 40-Bit Accumulators
  • 17- × 17-Bit Parallel Multiplier Coupled to a 40-Bit Dedicated Adder for Non-Pipelined Single-Cycle Multiply/Accumulate (MAC) Operation
  • Compare, Select, and Store Unit (CSSU) for the Add/Compare Selection of the Viterbi Operator
  • Exponent Encoder to Compute an Exponent Value of a 40-Bit Accumulator Value in a Single Cycle
  • Two Address Generators With Eight Auxiliary Registers and Two Auxiliary Register Arithmetic Units (ARAUs)
  • Data Bus With a Bus Holder Feature
  • Address Bus With a Bus Holder Feature (’548 and ’549 Only)
  • Extended Addressing Mode for 8M × 16-Bit Maximum Addressable External Program Space (’548 and ’549 Only)
  • 192K × 16-Bit Maximum Addressable Memory Space (64K Words Program, 64K Words Data, and 64K Words I/O)
  • On-Chip ROM with Some Configurable to Program/Data Memory
  • Dual-Access On-Chip RAM
  • Single-Access On-Chip RAM (’548/’549)
  • Single-Instruction Repeat and Block-Repeat Operations for Program Code
  • Block-Memory-Move Instructions for Better Program and Data Management
  • Instructions With a 32-Bit Long Word Operand
  • Instructions With Two- or Three-Operand Reads
  • Arithmetic Instructions With Parallel Store and Parallel Load
  • Conditional Store Instructions
  • Fast Return From Interrupt
  • On-Chip Peripherals
    • Software-Programmable Wait-State Generator and Programmable Bank Switching
    • On-Chip Phase-Locked Loop (PLL) Clock Generator With Internal Oscillator or External Clock Source
    • Full-Duplex Serial Port to Support 8- or 16-Bit Transfers (’541, ’LC545, and ’LC546 Only)
    • Time-Division Multiplexed (TDM) Serial Port (’542, ’543, ’548, and ’549 Only)
    • Buffered Serial Port (BSP) (’542, ’543, ’LC545, ’LC546, ’548, and ’549 Only)
    • 8-Bit Parallel Host-Port Interface (HPI) (’542, ’LC545, ’548, and ’549)
    • One 16-Bit Timer
    • External-Input/Output (XIO) Off Control to Disable the External Data Bus, Address Bus and Control Signals
  • Power Consumption Control With IDLE1, IDLE2, and IDLE3 Instructions With Power-Down Modes
  • CLKOUT Off Control to Disable CLKOUT
  • On-Chip Scan-Based Emulation Logic, IEEE Std 1149.1 (JTAG) Boundary Scan Logic
  • 25-ns Single-Cycle Fixed-Point Instruction Execution Time [40 MIPS] for 5-V Power Supply (’C541 and ’C542 Only)
  • 20-ns and 25-ns Single-Cycle Fixed-Point Instruction Execution Time (50 MIPS and 40 MIPS) for 3.3-V PowerSupply (’LC54x)
  • 15-ns Single-Cycle Fixed-Point Instruction Execution Time (66 MIPS) for 3.3-V Power Supply (’LC54xA, ’548, ’LC549)
  • 12.5-ns Single-Cycle Fixed-Point Instruction Execution Time (80 MIPS) for 3.3-V Power Supply (’LC548, ’LC549)
  • 10-ns and 8.3-ns Single-Cycle Fixed-Point Instruction Execution Time (100 and 120 MIPS) for 3.3-V Power Supply (2.5-V Core) (’VC549)

IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.

open-in-new 查找其它 C5000 低功率 DSP

描述

The TMS320C54x, TMS320LC54x, and TMS320VC54x fixed-point, digital signal processor (DSP) families (hereafter referred to as the ’54x unless otherwise specified) are based on an advanced modified Harvard architecture that has one program memory bus and three data memory buses. These processors also provide an arithmetic logic unit (ALU) that has a high degree of parallelism, application-specific hardware logic, on-chip memory, and additional on-chip peripherals. These DSP families also provide a highly specialized instruction set, which is the basis of the operational flexibility and speed of these DSPs.

Separate program and data spaces allow simultaneous access to program instructions and data, providing the high degree of parallelism. Two reads and one write operation can be performed in a single cycle. Instructions with parallel store and application-specific instructions can fully utilize this architecture. In addition, data can be transferred between data and program spaces. Such parallelism supports a powerful set of arithmetic, logic, and bit-manipulation operations that can all be performed in a single machine cycle. In addition, the ’C54x, ’LC54x, and ’VC54x versions include the control mechanisms to manage interrupts, repeated operations, and function calls.

open-in-new 查找其它 C5000 低功率 DSP
下载

No design support from TI available

This product does not have ongoing design support from TI for new projects, such as new content or software updates. If available, you will find relevant collateral, software and tools in the product folder. You can also search for archived information in the TI E2ETM support forums.

技术文档

= 特色
未找到结果。请清除搜索,并重试。 查看所有 3
类型 标题 下载最新的英文版本 发布
* 数据表 TMS320C54x, LC54x, VC54x Fixed-Point Digital Signal Processors 数据表 1999年 3月 30日
应用手册 TPS3801/09 - Smallest SVS for Monitoring DSPs and Processors 1999年 9月 2日
应用手册 Calculation of TMS320LC54x Power Dissipation 1997年 6月 1日

设计与开发

有关其他条款或所需资源,请点击下面的任何链接来查看详情页面。

硬件开发

评估板 下载
$408.94
说明
TMS320C5416 DSP 入门套件 (DSK) 是一个低成本开发平台,旨在加快基于 TI TMS320C54x DSP 的节能型应用的开发速度。该套件提供 USB 通信和真正的即插即用功能等性能增强型新功能,可让初级和熟练的设计人员立刻轻松地开始着手创新产品设计。

C5416 DSK 可以检测、诊断和校正 DSK 通信问题,更快地下载和逐步浏览代码,并利用实时数据交换 (RTDX?) 获得更高的吞吐量。


套件的所有内容包括:

  • C5416 DSP 开发板 -
  • C5416 DSK Code Composer Studio?v2.1 IDE
  • 快速入门指南
  • 技术参考资料
  • 客户支持指南
  • USB 电缆
  • 通用电源
  • AC 电源线

用于补充开发电路板的子卡

给您的 TI 或第三方 DSP 开发电路板添加新功能。评估各种数据转换器、原型电路板、新的输入/输出接口以及许多其它的外围设备。这些兼容卡使您能够通过常用连接器无缝地连接 TI DSK 和一些 TI EVM(TMS320 交叉平台子卡规范)。其它不兼容的卡可能需要胶联逻辑或特殊连接才能与 TI DSP 开发电路板配合使用。

特性

(此链接将使您离开 TI 网站。)

TMS320C5416 包含 TMS320C5416 DSP - 非常适合需要功率性能和区域优化组合应用的设计人员。借助 160MIPS 的性能,设计人员可以使用 160MHz 器件作为各种信号处理应用的基础,包括语音压缩/解压缩、语音识别、文本到语音转换、传真/数据转换和回波抵消。TMS320C5416 DSK 板的其它硬件特性包括:

  • 通过 USB 的嵌入式 JTAG 支持
  • 高质量 16-/20 位立体声编解码器
  • 四个 3.5mm 音频插孔,分别适用于麦克风、线性输入、扬声器、线性输出
  • 256K 字的闪存和 64K 字 RAM
  • 用于插入式模块的扩展端口连接器
  • 板载标准 JTAG 接口
  • +5V 通用电源

软件 - 通过 TI 强大而全面的 Code Composer Studio 开发平台,设计人员可以轻松面向 TMS32C5416 DSP 进行开发。在 Windows?98、Windows 2000 和 Windows XP 操作系统上运行的工具可让开发人员无缝管理复杂程度各不相同的项目。适用于 TMS320C5416 DSK 的 Code Composer Studio 特性包括:

  • 完全的集成开发环境 (IDE)、高效优化的 C/C++ 编译器、汇编器、连接器、调试器、采用 Code Mastro?技术的高级编辑器,实现了更快的代码创建、数据可视化,还有描述器和灵活的项目管理器
  • DSP/BIOS?实时内核
  • 目标错误恢复软件
  • DSK 诊断工具
  • 第三方软件可作为“插件”进行集成,实现了额外的功能性

软件开发

IDE、配置、编译器和调试器 下载
Code Composer Studio (CCS) 集成开发环境 (IDE)
CCSTUDIO

下载最新 Code Composer Studio 版本

Code Composer Studio™ - 集成开发环境

Code Composer Studio 是一种集成开发环境 (IDE),支持 TI 的微控制器和嵌入式处理器产品系列。Code Composer Studio 包含一整套用于开发和调试嵌入式应用的工具。它包含了用于优化的 C/C++ 编译器、源码编辑器、项目构建环境、调试器、描述器以及多种其他功能。直观的 IDE 提供了单个用户界面,可帮助您完成应用开发流程的每个步骤。熟悉的工具和界面使用户能够比以前更快地入手。Code Composer Studio 将 Eclipse 软件框架的优点和 TI 先进的嵌入式调试功能相结合,为嵌入式开发人员提供了一个引人注目、功能丰富的开发环境。

平台功能

详细了解特定处理器系列的可用功能:

 

Code Composer Studio 支持 TI 的广泛的嵌入式处理器产品系列。如果以上没有您感兴趣的系列,请选择在所用处理器内核上最接近的一种。

下载

  • CCS 最新版本 - 单击下面可以下载指定主机平台的 CCSv6。
  • 其他下载 - 有关完整下载的列表,请访问 CCS (...)

CAD/CAE 符号

封装 引脚 下载
LQFP (PBK) 128 了解详情
LQFP (PGE) 144 了解详情

订购与质量

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