产品详细信息

DSP 1 C64x DSP MHz (Max) 500, 600, 720 CPU 32-/64-bit Operating system DSP/BIOS PCIe 1 PCI Rating Catalog Operating temperature range (C) -40 to 105, 0 to 90
DSP 1 C64x DSP MHz (Max) 500, 600, 720 CPU 32-/64-bit Operating system DSP/BIOS PCIe 1 PCI Rating Catalog Operating temperature range (C) -40 to 105, 0 to 90
FCBGA (GLZ) 532 529 mm² 23 x 23 FCBGA (ZLZ) 532 529 mm² 23 x 23
  • Highest-Performance Fixed-Point Digital Signal Processors (DSPs)
    • 2-, 1.67-, 1.39-ns Instruction Cycle Time
    • 500-, 600-, 720-MHz Clock Rate
    • Eight 32-Bit Instructions/Cycle
    • Twenty-Eight Operations/Cycle
    • 4000, 4800, 5760 MIPS
    • Fully Software-Compatible With C62x™
    • C6414/15/16 Devices Pin-Compatible
  • VelociTI.2™ Extensions to VelociTI™ Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x™ DSP Core
    • Eight Highly Independent Functional Units With VelociTI.2™ Extensions:
      • Six ALUs (32-/40-Bit), Each Supports Single 32-Bit, Dual 16-Bit, or Quad 8-Bit Arithmetic per Clock Cycle
      • Two Multipliers Support Four 16 x 16-Bit Multiplies (32-Bit Results) per Clock Cycle or Eight 8 x 8-Bit Multiplies (16-Bit Results) per Clock Cycle
    • Non-Aligned Load-Store Architecture
    • 64 32-Bit General-Purpose Registers
    • Instruction Packing Reduces Code Size
    • All Instructions Conditional
  • Instruction Set Features
    • Byte-Addressable (8-/16-/32-/64-Bit Data)
    • 8-Bit Overflow Protection
    • Bit-Field Extract, Set, Clear
    • Normalization, Saturation, Bit-Counting
    • VelociTI.2™ Increased Orthogonality
  • Viterbi Decoder Coprocessor (VCP) [C6416]
    • Supports Over 600 7.95-Kbps AMR
    • Programmable Code Parameters
  • Turbo Decoder Coprocessor (TCP) [C6416]
    • Supports up to 7 2-Mbps or 43 384-Kbps 3GPP (6 Iterations)
    • Programmable Turbo Code and Decoding Parameters
  • L1/L2 Memory Architecture
    • 128K-Bit (16K-Byte) L1P Program Cache (Direct Mapped)
    • 128K-Bit (16K-Byte) L1D Data Cache (2-Way Set-Associative)
    • 8M-Bit (1024K-Byte) L2 Unified Mapped RAM/Cache (Flexible Allocation)
  • Two External Memory Interfaces (EMIFs)
    • One 64-Bit (EMIFA), One 16-Bit (EMIFB)
    • Glueless Interface to Asynchronous Memories (SRAM and EPROM) and Synchronous Memories (SDRAM, SBSRAM, ZBT SRAM, and FIFO)
    • 1280M-Byte Total Addressable External Memory Space
  • Enhanced Direct-Memory-Access (EDMA) Controller (64 Independent Channels)
  • Host-Port Interface (HPI)
    • User-Configurable Bus Width (32-/16-Bit)
  • 32-Bit/33-MHz, 3.3-V PCI Master/Slave Interface Conforms to PCI Specification 2.2 [C6415/C6416 ]
    • Three PCI Bus Address Registers:
         Prefetchable Memory
         Non-Prefetchable Memory I/O
    • Four-Wire Serial EEPROM Interface
    • PCI Interrupt Request Under DSP Program Control
    • DSP Interrupt Via PCI I/O Cycle
  • Three Multichannel Buffered Serial Ports
    • Direct Interface to T1/E1, MVIP, SCSA Framers
    • Up to 256 Channels Each
    • ST-Bus-Switching-, AC97-Compatible
    • Serial Peripheral Interface (SPI) Compatible (Motorola™)
  • Three 32-Bit General-Purpose Timers
  • Universal Test and Operations PHY Interface for ATM (UTOPIA) [C6415/C6416]
    • UTOPIA Level 2 Slave ATM Controller
    • 8-Bit Transmit and Receive Operations up to 50 MHz per Direction
    • User-Defined Cell Format up to 64 Bytes
  • Sixteen General-Purpose I/O (GPIO) Pins
  • Flexible PLL Clock Generator
  • IEEE-1149.1 (JTAG) Boundary-Scan-Compatible
  • 532-Pin Ball Grid Array (BGA) Package (GLZ, ZLZ and CLZ Suffixes), 0.8-mm Ball Pitch
  • 0.13-µm/6-Level Cu Metal Process (CMOS)
  • 3.3-V I/Os, 1.2-V/1.25-V Internal (500 MHz)
  • 3.3-V I/Os, 1.4-V Internal (600 and 720 MHz)

C62x, VelociTI.2, VelociTI, and TMS320C64x are trademarks of Texas Instruments.
Motorola is a trademark of Motorola, Inc.
IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.
TMS320C6000, C64x, and C6000 are trademarks of Texas Instruments.
Windows is a registered trademark of the Microsoft Corporation.
Other trademarks are the property of their respective owners.
Throughout the remainder of this document, the TMS320C6414, TMS320C6415, and TMS320C6416 shall be referred to as TMS320C64x or C64x where generic, and where specific, their individual full device part numbers will be used or abbreviated as C6414, C6415, or C6416.
These C64xdevices have two EMIFs (64-bit EMIFA and 16-bit EMIFB). The prefix "A" in front of a signal name indicates it is an EMIFA signal whereas a prefix "B" in front of a signal name indicates it is an EMIFB signal. Throughout the rest of this document, in generic EMIF areas of discussion, the prefix "A" or "B" may be omitted from the signal name.

  • Highest-Performance Fixed-Point Digital Signal Processors (DSPs)
    • 2-, 1.67-, 1.39-ns Instruction Cycle Time
    • 500-, 600-, 720-MHz Clock Rate
    • Eight 32-Bit Instructions/Cycle
    • Twenty-Eight Operations/Cycle
    • 4000, 4800, 5760 MIPS
    • Fully Software-Compatible With C62x™
    • C6414/15/16 Devices Pin-Compatible
  • VelociTI.2™ Extensions to VelociTI™ Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x™ DSP Core
    • Eight Highly Independent Functional Units With VelociTI.2™ Extensions:
      • Six ALUs (32-/40-Bit), Each Supports Single 32-Bit, Dual 16-Bit, or Quad 8-Bit Arithmetic per Clock Cycle
      • Two Multipliers Support Four 16 x 16-Bit Multiplies (32-Bit Results) per Clock Cycle or Eight 8 x 8-Bit Multiplies (16-Bit Results) per Clock Cycle
    • Non-Aligned Load-Store Architecture
    • 64 32-Bit General-Purpose Registers
    • Instruction Packing Reduces Code Size
    • All Instructions Conditional
  • Instruction Set Features
    • Byte-Addressable (8-/16-/32-/64-Bit Data)
    • 8-Bit Overflow Protection
    • Bit-Field Extract, Set, Clear
    • Normalization, Saturation, Bit-Counting
    • VelociTI.2™ Increased Orthogonality
  • Viterbi Decoder Coprocessor (VCP) [C6416]
    • Supports Over 600 7.95-Kbps AMR
    • Programmable Code Parameters
  • Turbo Decoder Coprocessor (TCP) [C6416]
    • Supports up to 7 2-Mbps or 43 384-Kbps 3GPP (6 Iterations)
    • Programmable Turbo Code and Decoding Parameters
  • L1/L2 Memory Architecture
    • 128K-Bit (16K-Byte) L1P Program Cache (Direct Mapped)
    • 128K-Bit (16K-Byte) L1D Data Cache (2-Way Set-Associative)
    • 8M-Bit (1024K-Byte) L2 Unified Mapped RAM/Cache (Flexible Allocation)
  • Two External Memory Interfaces (EMIFs)
    • One 64-Bit (EMIFA), One 16-Bit (EMIFB)
    • Glueless Interface to Asynchronous Memories (SRAM and EPROM) and Synchronous Memories (SDRAM, SBSRAM, ZBT SRAM, and FIFO)
    • 1280M-Byte Total Addressable External Memory Space
  • Enhanced Direct-Memory-Access (EDMA) Controller (64 Independent Channels)
  • Host-Port Interface (HPI)
    • User-Configurable Bus Width (32-/16-Bit)
  • 32-Bit/33-MHz, 3.3-V PCI Master/Slave Interface Conforms to PCI Specification 2.2 [C6415/C6416 ]
    • Three PCI Bus Address Registers:
         Prefetchable Memory
         Non-Prefetchable Memory I/O
    • Four-Wire Serial EEPROM Interface
    • PCI Interrupt Request Under DSP Program Control
    • DSP Interrupt Via PCI I/O Cycle
  • Three Multichannel Buffered Serial Ports
    • Direct Interface to T1/E1, MVIP, SCSA Framers
    • Up to 256 Channels Each
    • ST-Bus-Switching-, AC97-Compatible
    • Serial Peripheral Interface (SPI) Compatible (Motorola™)
  • Three 32-Bit General-Purpose Timers
  • Universal Test and Operations PHY Interface for ATM (UTOPIA) [C6415/C6416]
    • UTOPIA Level 2 Slave ATM Controller
    • 8-Bit Transmit and Receive Operations up to 50 MHz per Direction
    • User-Defined Cell Format up to 64 Bytes
  • Sixteen General-Purpose I/O (GPIO) Pins
  • Flexible PLL Clock Generator
  • IEEE-1149.1 (JTAG) Boundary-Scan-Compatible
  • 532-Pin Ball Grid Array (BGA) Package (GLZ, ZLZ and CLZ Suffixes), 0.8-mm Ball Pitch
  • 0.13-µm/6-Level Cu Metal Process (CMOS)
  • 3.3-V I/Os, 1.2-V/1.25-V Internal (500 MHz)
  • 3.3-V I/Os, 1.4-V Internal (600 and 720 MHz)

C62x, VelociTI.2, VelociTI, and TMS320C64x are trademarks of Texas Instruments.
Motorola is a trademark of Motorola, Inc.
IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.
TMS320C6000, C64x, and C6000 are trademarks of Texas Instruments.
Windows is a registered trademark of the Microsoft Corporation.
Other trademarks are the property of their respective owners.
Throughout the remainder of this document, the TMS320C6414, TMS320C6415, and TMS320C6416 shall be referred to as TMS320C64x or C64x where generic, and where specific, their individual full device part numbers will be used or abbreviated as C6414, C6415, or C6416.
These C64xdevices have two EMIFs (64-bit EMIFA and 16-bit EMIFB). The prefix "A" in front of a signal name indicates it is an EMIFA signal whereas a prefix "B" in front of a signal name indicates it is an EMIFB signal. Throughout the rest of this document, in generic EMIF areas of discussion, the prefix "A" or "B" may be omitted from the signal name.

The TMS320C64x™ DSPs (including the TMS320C6414, TMS320C6415, and TMS320C6416 devices) are the highest-performance fixed-point DSP generation in the TMS320C6000™ DSP platform. The TMS320C64x™ (C64x™) device is based on the second-generation high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture (VelociTI.2™ developed by Texas Instruments (TI), making these DSPs an excellent choice for multichannel and multifunction applications. The C64x™ is a code-compatible member of the C6000™ DSP platform.

With performance of up to 5760 million instructions per second (MIPS) at a clock rate of 720 MHz, the C64x devices offer cost-effective solutions to high-performance DSP programming challenges. The C64x DSPs possess the operational flexibility of high-speed controllers and the numerical capability of array processors. The C64x™ DSP core processor has 64 general-purpose registers of 32-bit word length and eight highly independent functional units—two multipliers for a 32-bit result and six arithmetic logic units (ALUs)— with VelociTI.2™ extensions. The VelociTI.2™ extensions in the eight functional units include new instructions to accelerate the performance in key applications and extend the parallelism of the VelociTI™ architecture. The C64x can produce four 16-bit multiply-accumulates (MACs) per cycle for a total of 2880 million MACs per second (MMACS), or eight 8-bit MACs per cycle for a total of 5760 MMACS. The C64x DSP also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals similar to the other C6000™ DSP platform devices.

The C6416 device has two high-performance embedded coprocessors [Viterbi Decoder Coprocessor (VCP) and Turbo Decoder Coprocessor (TCP)] that significantly speed up channel-decoding operations on-chip. The VCP operating at CPU clock divided-by-4 can decode over 600 7.95-Kbps adaptive multi-rate (AMR) [K = 9, R = 1/3] voice channels. The VCP supports constraint lengths K = 5, 6, 7, 8, and 9, rates R = 1/2, 1/3, and 1/4, and flexible polynomials, while generating hard decisions or soft decisions. The TCP operating at CPU clock divided-by-2 can decode up to forty-three 384-Kbps or seven 2-Mbps turbo encoded channels (assuming 6 iterations). The TCP implements the max*log-map algorithm and is designed to support all polynomials and rates required by Third-Generation Partnership Projects (3GPP and 3GPP2), with fully programmable frame length and turbo interleaver. Decoding parameters such as the number of iterations and stopping criteria are also programmable. Communications between the VCP/TCP and the CPU are carried out through the EDMA controller.

The C64x uses a two-level cache-based architecture and has a powerful and diverse set of peripherals. The Level 1 program cache (L1P) is a 128-Kbit direct mapped cache and the Level 1 data cache (L1D) is a 128-Kbit 2-way set-associative cache. The Level 2 memory/cache (L2) consists of an 8-Mbit memory space that is shared between program and data space. L2 memory can be configured as mapped memory or combinations of cache (up to 256K bytes) and mapped memory. The peripheral set includes three multichannel buffered serial ports (McBSPs); an 8-bit Universal Test and Operations PHY Interface for Asynchronous Transfer Mode (ATM) Slave [UTOPIA Slave] port (C6415/C6416 only); three 32-bit general-purpose timers; a user-configurable 16-bit or 32-bit host-port interface (HPI16/HPI32); a peripheral component interconnect (PCI) [C6415/C6416 only]; a general-purpose input/output port (GPIO) with 16 GPIO pins; and two glueless external memory interfaces (64-bit EMIFA and 16-bit EMIFB), both of which are capable of interfacing to synchronous and asynchronous memories and peripherals.

The C64x has a complete set of development tools which includes: an advanced C compiler with C64x-specific enhancements, an assembly optimizer to simplify programming and scheduling, and a Windows™ debugger interface for visibility into source code execution.

The TMS320C64x™ DSPs (including the TMS320C6414, TMS320C6415, and TMS320C6416 devices) are the highest-performance fixed-point DSP generation in the TMS320C6000™ DSP platform. The TMS320C64x™ (C64x™) device is based on the second-generation high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture (VelociTI.2™ developed by Texas Instruments (TI), making these DSPs an excellent choice for multichannel and multifunction applications. The C64x™ is a code-compatible member of the C6000™ DSP platform.

With performance of up to 5760 million instructions per second (MIPS) at a clock rate of 720 MHz, the C64x devices offer cost-effective solutions to high-performance DSP programming challenges. The C64x DSPs possess the operational flexibility of high-speed controllers and the numerical capability of array processors. The C64x™ DSP core processor has 64 general-purpose registers of 32-bit word length and eight highly independent functional units—two multipliers for a 32-bit result and six arithmetic logic units (ALUs)— with VelociTI.2™ extensions. The VelociTI.2™ extensions in the eight functional units include new instructions to accelerate the performance in key applications and extend the parallelism of the VelociTI™ architecture. The C64x can produce four 16-bit multiply-accumulates (MACs) per cycle for a total of 2880 million MACs per second (MMACS), or eight 8-bit MACs per cycle for a total of 5760 MMACS. The C64x DSP also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals similar to the other C6000™ DSP platform devices.

The C6416 device has two high-performance embedded coprocessors [Viterbi Decoder Coprocessor (VCP) and Turbo Decoder Coprocessor (TCP)] that significantly speed up channel-decoding operations on-chip. The VCP operating at CPU clock divided-by-4 can decode over 600 7.95-Kbps adaptive multi-rate (AMR) [K = 9, R = 1/3] voice channels. The VCP supports constraint lengths K = 5, 6, 7, 8, and 9, rates R = 1/2, 1/3, and 1/4, and flexible polynomials, while generating hard decisions or soft decisions. The TCP operating at CPU clock divided-by-2 can decode up to forty-three 384-Kbps or seven 2-Mbps turbo encoded channels (assuming 6 iterations). The TCP implements the max*log-map algorithm and is designed to support all polynomials and rates required by Third-Generation Partnership Projects (3GPP and 3GPP2), with fully programmable frame length and turbo interleaver. Decoding parameters such as the number of iterations and stopping criteria are also programmable. Communications between the VCP/TCP and the CPU are carried out through the EDMA controller.

The C64x uses a two-level cache-based architecture and has a powerful and diverse set of peripherals. The Level 1 program cache (L1P) is a 128-Kbit direct mapped cache and the Level 1 data cache (L1D) is a 128-Kbit 2-way set-associative cache. The Level 2 memory/cache (L2) consists of an 8-Mbit memory space that is shared between program and data space. L2 memory can be configured as mapped memory or combinations of cache (up to 256K bytes) and mapped memory. The peripheral set includes three multichannel buffered serial ports (McBSPs); an 8-bit Universal Test and Operations PHY Interface for Asynchronous Transfer Mode (ATM) Slave [UTOPIA Slave] port (C6415/C6416 only); three 32-bit general-purpose timers; a user-configurable 16-bit or 32-bit host-port interface (HPI16/HPI32); a peripheral component interconnect (PCI) [C6415/C6416 only]; a general-purpose input/output port (GPIO) with 16 GPIO pins; and two glueless external memory interfaces (64-bit EMIFA and 16-bit EMIFB), both of which are capable of interfacing to synchronous and asynchronous memories and peripherals.

The C64x has a complete set of development tools which includes: an advanced C compiler with C64x-specific enhancements, an assembly optimizer to simplify programming and scheduling, and a Windows™ debugger interface for visibility into source code execution.

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This product does not have ongoing design support from TI for new projects, such as new content or software updates. If available, you will find relevant collateral, software and tools in the product folder. You can also search for archived information in the TI E2ETM support forums.

技术文档

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类型 项目标题 下载最新的英语版本 日期
* 数据表 TMS320C6414, TMS320C6415, TMS320C6416 Fixed-Point Digital Signal Processors 数据表 (Rev. N) 26 May 2005
* 勘误表 TMS320C6414/C6415/C6416 Silicon Errata (Silicon Rev. 1.0,1.01,1.02,1.03,1.1,2.0) (Rev. T) 01 Aug 2007
应用手册 如何将 CCS 3.x 工程迁移至最新的 Code Composer Studio™ (CCS) (Rev. A) 下载英文版本 (Rev.A) PDF | HTML 19 May 2021
技术文章 Difficult to see. Always in motion is the future 04 Jan 2016
技术文章 Announcing the new entry-level Sitara processor 09 Dec 2015
技术文章 Automotive Surround View Technology trends 31 Aug 2015
技术文章 Where are DSPs used? What makes them so good at math? How do they work with Open APIs? 06 Aug 2015
用户指南 Emulation and Trace Headers Technical Reference Manual (Rev. I) 09 Aug 2012
应用手册 Power Consumption Guide for the C66x 06 Oct 2011
用户指南 TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide (Rev. J) 30 Jul 2010
用户指南 TMS320C6000 DSP Peripherals Overview Reference Guide (Rev. Q) 02 Jul 2009
应用手册 Migrating from TMS320C6416/15/14 to TMS320C6416T/15T/14T (Rev. B) 22 Feb 2008
应用手册 TMS320C6000 EMIF-to-External SDRAM Interface (Rev. E) 04 Sep 2007
用户指南 TMS320C6000 DSP External Memory Interface (EMIF) Reference Guide (Rev. E) 11 Apr 2007
更多文献资料 TMS320C6000 DSP TCP/IP Stack Software (Rev. C) 04 Apr 2007
用户指南 TMS320C6000 DSP Peripheral Component Interconnect (PCI) Reference Guide (Rev. C) 25 Jan 2007
用户指南 TMS320C6000 DSP Multichannel Buffered Serial Port ( McBSP) Reference Guide (Rev. G) 14 Dec 2006
用户指南 TMS320C6000 DSP Enhanced Direct Memory Access (EDMA) Controller Reference Guide (Rev. C) 15 Nov 2006
用户指南 TMS320C64x DSP Two Level Internal Memory Reference Guide (Rev. C) 28 Feb 2006
用户指南 TMS320C6000 DSP Host-Post Interface (HPI) Reference Guide (Rev. C) 01 Jan 2006
用户指南 TMS320C6000 DSP 外设概述参考指南 (Rev. H) 下载最新的英文版本 (Rev.Q) 07 Nov 2005
应用手册 从 TMS320C6416/15/14/11 修订版 1.1 迁移到修订版 2.0 下载英文版本 07 Nov 2005
应用手册 TMS320C6415 Hardware Designer's Resource Guide (Rev. A) 22 Oct 2005
应用手册 TMS320C64x to TMS320C64x+ CPU Migration Guide (Rev. A) 20 Oct 2005
应用手册 TMS320C6000 EMIF to USB Interfacing Using Cypress EZ-USB SX2 (Rev. A) 20 May 2005
用户指南 TMS320C6000 DSP Power-Down Logic and Modes Reference Guide (Rev. C) 01 Mar 2005
用户指南 TMS320C6000 DSP 32-bit Timer Reference Guide (Rev. B) 25 Jan 2005
应用手册 Use and Handling of Semiconductor Packages With ENIG Pad Finishes 31 Aug 2004
用户指南 TMS320C6000 Chip Support Library API Reference Guide (Rev. J) 13 Aug 2004
用户指南 TMS320C64x DSP Universal Test and Operations PHY Interface for ATM (UTOPIA) RG (Rev. A) 11 Jun 2004
应用手册 TMS320C64x Reference Design 12 May 2004
应用手册 TMS320C6000 Tools: Vector Table and Boot ROM Creation (Rev. D) 26 Apr 2004
应用手册 TMS320C6000 Board Design: Considerations for Debug (Rev. C) 21 Apr 2004
用户指南 TMS320C6000 DSP General-Purpose Input/Output (GPIO) Reference Guide (Rev. A) 25 Mar 2004
应用手册 TMS320C6000 McBSP Initialization (Rev. C) 08 Mar 2004
应用手册 TMS320C6000 EDMA IO Scheduling and Performance 05 Mar 2004
应用手册 TMS320C64x EDMA Performance Data 05 Mar 2004
应用手册 TMS320C64x EDMA Architecture 03 Mar 2004
应用手册 TMS320C64x DSP Peripheral Component Interconnect (PCI) Performance 31 Oct 2003
应用手册 TMS320C64x DSP Host Port Interface (HPI) Performance 24 Oct 2003
应用手册 Tips for Using the EDMA with the Utopia Port 15 Sep 2003
用户指南 TMS320C6000 DSP Designing for JTAG Emulation Reference Guide 31 Jul 2003
应用手册 TMS320C6414/5/6 Power Consumption Summary (Rev. C) 30 Jun 2003
用户指南 TMS320C6000 DSP Cache User's Guide (Rev. A) 05 May 2003
应用手册 Using IBIS Models for Timing Analysis (Rev. A) 15 Apr 2003
应用手册 How to Begin Development Today With the TMS320C6414, C6415, and C6416 DSPs (Rev. A) 06 Mar 2003
应用手册 TMS320C6000 McBSP Interface to an ST-BUS Device (Rev. B) 04 Jun 2002
应用手册 TMS320C6000 HPI to PCI Interfacing Using the PLX PCI9050 (Rev. C) 17 Apr 2002
应用手册 TMS320C6000 Board Design for JTAG (Rev. C) 02 Apr 2002
应用手册 TMS320C6000 EMIF to External Flash Memory (Rev. A) 13 Feb 2002
应用手册 Cache Usage in High-Performance DSP Applications with the TMS320C64x 13 Dec 2001
应用手册 Using a TMS320C6000 McBSP for Data Packing (Rev. A) 31 Oct 2001
应用手册 TMS320C6000 Enhanced DMA: Example Applications (Rev. A) 24 Oct 2001
应用手册 Interfacing theTMS320C6000 EMIFto a PCI Bus Using the AMCC S5933 PCI Controller (Rev. A) 30 Sep 2001
应用手册 TMS320C6000 Host Port to MC68360 Interface (Rev. A) 30 Sep 2001
应用手册 TMS320C6000 EMIF to External Asynchronous SRAM Interface (Rev. A) 31 Aug 2001
应用手册 TMS320C6000 Host Port to the i80960 Microprocessors Interface (Rev. A) 31 Aug 2001
应用手册 Using the TMS320C6000 McBSP as a High Speed Communication Port (Rev. A) 31 Aug 2001
应用手册 TMS320C6000 System Clock Circuit Example (Rev. A) 15 Aug 2001
应用手册 TMS320C6000 McBSP to Voice Band Audio Processor (VBAP) Interface (Rev. A) 23 Jul 2001
应用手册 TMS320C6000 McBSP: AC'97 Codec Interface (TLV320AIC27) (Rev. A) 10 Jul 2001
应用手册 TMS320C6000 McBSP: Interface to SPI ROM (Rev. C) 30 Jun 2001
应用手册 TMS320C6000 Host Port to MPC860 Interface (Rev. A) 21 Jun 2001
应用手册 TMS320C6000 McBSP: IOM-2 Interface (Rev. A) 21 May 2001
用户指南 TMS320C64x Technical Overview (Rev. B) 30 Jan 2001
应用手册 Circular Buffering on TMS320C6000 (Rev. A) 12 Sep 2000
应用手册 TMS320C6000 McBSP as a TDM Highway (Rev. A) 11 Sep 2000
应用手册 TMS320C6000 u-Law and a-Law Companding with Software or the McBSP 02 Feb 2000
应用手册 General Guide to Implement Logarithmic and Exponential Operations on Fixed-Point 31 Jan 2000
应用手册 TMS320C6000 C Compiler: C Implementation of Intrinsics 07 Dec 1999
应用手册 TMS320C6000 McBSP: I2S Interface 08 Sep 1999

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TMDSDSK6416 — TMS320C6416 DSP 入门套件 (DSK)

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XDS560v2 System Trace 在其巨大的外部存储器缓冲区中加入了系统引脚跟踪。这种外部存储器缓冲区适用于指定的 TI 器件,通过捕获相关器件级信息,获得准确的总线性能活动和吞吐量,并对内核和外设进行电源管理。此外,对于带有嵌入式缓冲跟踪器 (ETB) 的所有 ARM 和 DSP 处理器,所有 XDS (...)

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FAXLIB 用于 C66x、C64x+ 和 C55x 处理器的传真库 (FAXLIB)

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)

支持的产品和硬件

支持的产品和硬件

产品
基于 Arm 的处理器
66AK2G12 高性能多核 DSP+Arm - 1 个 Arm A15 内核、1 个 C66x DSP 内核
数字信号处理器 (DSP)
DM505 适用于视觉分析的 SoC,采用 15mm 封装 SM320C6201-EP 增强型产品 C6201 定点 DSP SM320C6415 军用级 C64x 定点 DSP SM320C6415-EP 增强型产品 C6415 定点 DSP SM320C6424-EP 增强型产品 C6424 定点 DSP SM320C6455-EP 增强型产品 C6455 定点 DSP SM320C6472-HIREL 高可靠性产品 6 核 C6472 定点 DSP SM320C6678-HIREL 高可靠性产品高性能 8 核 C6678 定点和浮点 DSP SM320C6701 用于军事应用的单核 C67x 浮点 DSP - 高达 167MHz SM320C6701-EP 增强型产品 C6701 浮点 DSP SM320C6711D-EP 增强型产品 C6711D 浮点 DSP SM320C6712D-EP 增强型产品 C6712D DSP SM320C6713B-EP 增强型产品 C6713 浮点 DSP SM320C6727B 军用级 C6727B 浮点 DSP SM320C6727B-EP 增强型产品 C6727 浮点 DSP SM320DM642-HIREL 高可靠性产品数字媒体 DM642 DSP SM32C6416T-EP 增强型产品 C6416T 定点 DSP SMJ320C6201B 军用定点数字信号处理器 SMJ320C6203 军用级 C62x 定点 DSP - 陶瓷封装 SMJ320C6415 军用级 C64x 定点 DSP - 陶瓷封装 SMJ320C6701 军用级 C67x 浮点 DSP - 陶瓷封装 SMJ320C6701-SP 航天级 C6701 浮点 DSP - 抗辐射 V 类、采用陶瓷封装 SMV320C6727B-SP 航天级 C6727B 浮点 DSP - 抗辐射 V 类、采用陶瓷封装 TMS320C5517 低功耗 C55x 定点 DSP- 高达 200MHz、USB、LCD 接口、FFT HWA、SAR ADC TMS320C5532 低功耗 C55x 定点 DSP- 高达 100MHz TMS320C5533 低功耗 C55x 定点 DSP- 高达 100MHz、USB TMS320C5534 低功耗 C55x 定点 DSP- 高达 100MHz、USB、LCD 接口 TMS320C5535 低功耗 C55x 定点 DSP- 高达 100MHz、USB、LCD 接口、FFT HWA、SAR ADC TMS320C6201 定点数字信号处理器 TMS320C6202 定点数字信号处理器 TMS320C6202B C62x 定点 DSP- 高达 300MHz、384KB TMS320C6203B C62x 定点 DSP- 高达 300MHz、896KB TMS320C6204 定点数字信号处理器 TMS320C6205 定点数字信号处理器 TMS320C6211B C62x 定点 DSP- 高达 167MHz TMS320C6411 C64x 定点 DSP- 高达 300MHz、McBSP TMS320C6414 C64x 定点 DSP- 高达 720MHz、McBSP TMS320C6415 C64x 定点 DSP- 高达 720MHz、McBSP、PCI TMS320C6416 C64x 定点 DSP- 高达 720MHz、McBSP、PCI、VCP/TCP TMS320C6421Q C64x+ 定点 DSP- 高达 600MHz、8 位 EMIFA、16 位 DDR2 TMS320C6424Q C64x+ 定点 DSP- 高达 600MHz、16/8 位 EMIFA、32/16 位 DDR2 TMS320C6454 C64x+ 定点 DSP - 高达 1GHz、64 位 EMIFA、32/16 位 DDR2、1Gbps 以太网 TMS320C6457 通信基础设施数字信号处理器 TMS320C6701 C67x 浮点 DSP- 高达 167MHz、McBSP TMS320C6711D C67x 浮点 DSP- 高达 250MHz、McBSP、32 位 EMIFA TMS320C6712D C67x 浮点 DSP- 高达 150MHz、McBSP、16 位 EMIFA TMS320C6720 C67x 浮点 DSP - 200MHz、McASP、16 位 EMIFA TMS320C6722B C67x 浮点 DSP- 高达 250MHz、McASP、16 位 EMIFA TMS320C6726B C67x 浮点 DSP- 高达 266MHz、McASP、16 位 EMIFA TMS320C6727 C67x 浮点 DSP- 高达 250MHz、McASP、32 位 EMIFA TMS320C6727B C67x 浮点 DSP- 高达 350MHz、McASP、32 位 EMIFA TMS320C6743 低功耗 C674x 浮点 DSP- 375MHz TMS320C6745 低功耗 C674x 浮点 DSP- 456MHz、QFP TMS320C6747 低功耗 C674x 浮点 DSP- 456MHz、PBGA TMS320DM642Q 视频/成像定点数字信号处理器 TMS320DM6431Q 数字媒体处理器,性能高达 2400MIPS、300MHz 时钟速率 TMS320DM6435Q 数字媒体处理器,性能高达 4800MIPS、600MHz 时钟速率、1 个 McASP、1 个 McBSP TMS320DM6437Q 数字媒体处理器,性能高达 4800MIPS、600MHz 时钟速率、1 个 McASP、2 个 McBSP TMS320DM6441 达芬奇数字媒体片上系统 TMS320DM6467T 数字媒体片上系统 TMS320DM647 数字媒体处理器
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AEC-AER 用于 TI C64x+、C674x、C55x 和 Cortex(tm)A8 处理器的回声抵消/消除 - 即刻可得

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)

支持的产品和硬件

支持的产品和硬件

产品
基于 Arm 的处理器
66AK2G12 高性能多核 DSP+Arm - 1 个 Arm A15 内核、1 个 C66x DSP 内核
数字信号处理器 (DSP)
DM505 适用于视觉分析的 SoC,采用 15mm 封装 SM320C6201-EP 增强型产品 C6201 定点 DSP SM320C6415 军用级 C64x 定点 DSP SM320C6415-EP 增强型产品 C6415 定点 DSP SM320C6424-EP 增强型产品 C6424 定点 DSP SM320C6455-EP 增强型产品 C6455 定点 DSP SM320C6472-HIREL 高可靠性产品 6 核 C6472 定点 DSP SM320C6678-HIREL 高可靠性产品高性能 8 核 C6678 定点和浮点 DSP SM320C6701 用于军事应用的单核 C67x 浮点 DSP - 高达 167MHz SM320C6701-EP 增强型产品 C6701 浮点 DSP SM320C6711D-EP 增强型产品 C6711D 浮点 DSP SM320C6712D-EP 增强型产品 C6712D DSP SM320C6713B-EP 增强型产品 C6713 浮点 DSP SM320C6727B 军用级 C6727B 浮点 DSP SM320C6727B-EP 增强型产品 C6727 浮点 DSP SM320DM642-HIREL 高可靠性产品数字媒体 DM642 DSP SM32C6416T-EP 增强型产品 C6416T 定点 DSP SMJ320C6201B 军用定点数字信号处理器 SMJ320C6203 军用级 C62x 定点 DSP - 陶瓷封装 SMJ320C6415 军用级 C64x 定点 DSP - 陶瓷封装 SMJ320C6701 军用级 C67x 浮点 DSP - 陶瓷封装 SMJ320C6701-SP 航天级 C6701 浮点 DSP - 抗辐射 V 类、采用陶瓷封装 SMV320C6727B-SP 航天级 C6727B 浮点 DSP - 抗辐射 V 类、采用陶瓷封装 TMS320C5517 低功耗 C55x 定点 DSP- 高达 200MHz、USB、LCD 接口、FFT HWA、SAR ADC TMS320C5532 低功耗 C55x 定点 DSP- 高达 100MHz TMS320C5533 低功耗 C55x 定点 DSP- 高达 100MHz、USB TMS320C5534 低功耗 C55x 定点 DSP- 高达 100MHz、USB、LCD 接口 TMS320C5535 低功耗 C55x 定点 DSP- 高达 100MHz、USB、LCD 接口、FFT HWA、SAR ADC TMS320C6201 定点数字信号处理器 TMS320C6202 定点数字信号处理器 TMS320C6202B C62x 定点 DSP- 高达 300MHz、384KB TMS320C6203B C62x 定点 DSP- 高达 300MHz、896KB TMS320C6204 定点数字信号处理器 TMS320C6205 定点数字信号处理器 TMS320C6211B C62x 定点 DSP- 高达 167MHz TMS320C6411 C64x 定点 DSP- 高达 300MHz、McBSP TMS320C6414 C64x 定点 DSP- 高达 720MHz、McBSP TMS320C6415 C64x 定点 DSP- 高达 720MHz、McBSP、PCI TMS320C6416 C64x 定点 DSP- 高达 720MHz、McBSP、PCI、VCP/TCP TMS320C6421Q C64x+ 定点 DSP- 高达 600MHz、8 位 EMIFA、16 位 DDR2 TMS320C6424Q C64x+ 定点 DSP- 高达 600MHz、16/8 位 EMIFA、32/16 位 DDR2 TMS320C6454 C64x+ 定点 DSP - 高达 1GHz、64 位 EMIFA、32/16 位 DDR2、1Gbps 以太网 TMS320C6457 通信基础设施数字信号处理器 TMS320C6701 C67x 浮点 DSP- 高达 167MHz、McBSP TMS320C6711D C67x 浮点 DSP- 高达 250MHz、McBSP、32 位 EMIFA TMS320C6712D C67x 浮点 DSP- 高达 150MHz、McBSP、16 位 EMIFA TMS320C6720 C67x 浮点 DSP - 200MHz、McASP、16 位 EMIFA TMS320C6722B C67x 浮点 DSP- 高达 250MHz、McASP、16 位 EMIFA TMS320C6726B C67x 浮点 DSP- 高达 266MHz、McASP、16 位 EMIFA TMS320C6727 C67x 浮点 DSP- 高达 250MHz、McASP、32 位 EMIFA TMS320C6727B C67x 浮点 DSP- 高达 350MHz、McASP、32 位 EMIFA TMS320C6743 低功耗 C674x 浮点 DSP- 375MHz TMS320C6745 低功耗 C674x 浮点 DSP- 456MHz、QFP TMS320C6747 低功耗 C674x 浮点 DSP- 456MHz、PBGA TMS320DM642Q 视频/成像定点数字信号处理器 TMS320DM6431Q 数字媒体处理器,性能高达 2400MIPS、300MHz 时钟速率 TMS320DM6435Q 数字媒体处理器,性能高达 4800MIPS、600MHz 时钟速率、1 个 McASP、1 个 McBSP TMS320DM6437Q 数字媒体处理器,性能高达 4800MIPS、600MHz 时钟速率、1 个 McASP、2 个 McBSP TMS320DM6441 达芬奇数字媒体片上系统 TMS320DM6467T 数字媒体片上系统 TMS320DM647 数字媒体处理器
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驱动程序或库

VOLIB 用于 C66x、C64x+ 和 C55x 处理器的音频库 (VoLIB)

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)

支持的产品和硬件

支持的产品和硬件

产品
基于 Arm 的处理器
66AK2G12 高性能多核 DSP+Arm - 1 个 Arm A15 内核、1 个 C66x DSP 内核
数字信号处理器 (DSP)
DM505 适用于视觉分析的 SoC,采用 15mm 封装 SM320C6201-EP 增强型产品 C6201 定点 DSP SM320C6415 军用级 C64x 定点 DSP SM320C6415-EP 增强型产品 C6415 定点 DSP SM320C6424-EP 增强型产品 C6424 定点 DSP SM320C6455-EP 增强型产品 C6455 定点 DSP SM320C6472-HIREL 高可靠性产品 6 核 C6472 定点 DSP SM320C6678-HIREL 高可靠性产品高性能 8 核 C6678 定点和浮点 DSP SM320C6701 用于军事应用的单核 C67x 浮点 DSP - 高达 167MHz SM320C6701-EP 增强型产品 C6701 浮点 DSP SM320C6711D-EP 增强型产品 C6711D 浮点 DSP SM320C6712D-EP 增强型产品 C6712D DSP SM320C6713B-EP 增强型产品 C6713 浮点 DSP SM320C6727B 军用级 C6727B 浮点 DSP SM320C6727B-EP 增强型产品 C6727 浮点 DSP SM320DM642-HIREL 高可靠性产品数字媒体 DM642 DSP SM32C6416T-EP 增强型产品 C6416T 定点 DSP SMJ320C6201B 军用定点数字信号处理器 SMJ320C6203 军用级 C62x 定点 DSP - 陶瓷封装 SMJ320C6415 军用级 C64x 定点 DSP - 陶瓷封装 SMJ320C6701 军用级 C67x 浮点 DSP - 陶瓷封装 SMJ320C6701-SP 航天级 C6701 浮点 DSP - 抗辐射 V 类、采用陶瓷封装 SMV320C6727B-SP 航天级 C6727B 浮点 DSP - 抗辐射 V 类、采用陶瓷封装 TMS320C5517 低功耗 C55x 定点 DSP- 高达 200MHz、USB、LCD 接口、FFT HWA、SAR ADC TMS320C5532 低功耗 C55x 定点 DSP- 高达 100MHz TMS320C5533 低功耗 C55x 定点 DSP- 高达 100MHz、USB TMS320C5534 低功耗 C55x 定点 DSP- 高达 100MHz、USB、LCD 接口 TMS320C5535 低功耗 C55x 定点 DSP- 高达 100MHz、USB、LCD 接口、FFT HWA、SAR ADC TMS320C6201 定点数字信号处理器 TMS320C6202 定点数字信号处理器 TMS320C6202B C62x 定点 DSP- 高达 300MHz、384KB TMS320C6203B C62x 定点 DSP- 高达 300MHz、896KB TMS320C6204 定点数字信号处理器 TMS320C6205 定点数字信号处理器 TMS320C6211B C62x 定点 DSP- 高达 167MHz TMS320C6411 C64x 定点 DSP- 高达 300MHz、McBSP TMS320C6414 C64x 定点 DSP- 高达 720MHz、McBSP TMS320C6415 C64x 定点 DSP- 高达 720MHz、McBSP、PCI TMS320C6416 C64x 定点 DSP- 高达 720MHz、McBSP、PCI、VCP/TCP TMS320C6421Q C64x+ 定点 DSP- 高达 600MHz、8 位 EMIFA、16 位 DDR2 TMS320C6424Q C64x+ 定点 DSP- 高达 600MHz、16/8 位 EMIFA、32/16 位 DDR2 TMS320C6454 C64x+ 定点 DSP - 高达 1GHz、64 位 EMIFA、32/16 位 DDR2、1Gbps 以太网 TMS320C6457 通信基础设施数字信号处理器 TMS320C6701 C67x 浮点 DSP- 高达 167MHz、McBSP TMS320C6711D C67x 浮点 DSP- 高达 250MHz、McBSP、32 位 EMIFA TMS320C6712D C67x 浮点 DSP- 高达 150MHz、McBSP、16 位 EMIFA TMS320C6720 C67x 浮点 DSP - 200MHz、McASP、16 位 EMIFA TMS320C6722B C67x 浮点 DSP- 高达 250MHz、McASP、16 位 EMIFA TMS320C6726B C67x 浮点 DSP- 高达 266MHz、McASP、16 位 EMIFA TMS320C6727 C67x 浮点 DSP- 高达 250MHz、McASP、32 位 EMIFA TMS320C6727B C67x 浮点 DSP- 高达 350MHz、McASP、32 位 EMIFA TMS320C6743 低功耗 C674x 浮点 DSP- 375MHz TMS320C6745 低功耗 C674x 浮点 DSP- 456MHz、QFP TMS320C6747 低功耗 C674x 浮点 DSP- 456MHz、PBGA TMS320DM642Q 视频/成像定点数字信号处理器 TMS320DM6431Q 数字媒体处理器,性能高达 2400MIPS、300MHz 时钟速率 TMS320DM6435Q 数字媒体处理器,性能高达 4800MIPS、600MHz 时钟速率、1 个 McASP、1 个 McBSP TMS320DM6437Q 数字媒体处理器,性能高达 4800MIPS、600MHz 时钟速率、1 个 McASP、2 个 McBSP TMS320DM6441 达芬奇数字媒体片上系统 TMS320DM6467T 数字媒体片上系统 TMS320DM647 数字媒体处理器
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IDE、配置、编译器或调试器

CCSTUDIO Code Composer Studio 集成式开发环境 (IDE)

Code Composer Studio؜™ software is an integrated development environment (IDE) that supports TI's microcontroller (MCU) and embedded processor portfolios. Code Composer Studio software comprises a suite of tools used to develop and debug embedded applications. The software includes an (...)
支持的产品和硬件

支持的产品和硬件

此设计资源支持这些类别中的大部分产品。

查看产品详情页,确认是否能提供支持

parametric-filter MSP430 微控制器
parametric-filter C2000 实时微控制器
parametric-filter 基于 Arm 的微控制器
parametric-filter 数字信号处理器 (DSP)
parametric-filter 基于 Arm 的处理器
parametric-filter 信号调节器
parametric-filter 毫米波雷达传感器
parametric-filter Zigbee 产品
parametric-filter Wi-Fi 产品
parametric-filter Thread 产品
parametric-filter 其他无线技术
parametric-filter 低于 1GHz 产品
parametric-filter 多协议产品
parametric-filter 蓝牙产品
parametric-filter 数字电源隔离式控制器
产品
汽车毫米波雷达传感器
AWR1243 76GHz 至 81GHz 高性能汽车类 MMIC AWR1443 集成 MCU 和硬件加速器的单芯片 76GHz 至 81GHz 汽车雷达传感器 AWR1642 集成 DSP 和 MCU 的单芯片 76GHz 至 81GHz 汽车雷达传感器 AWR1843 集成 DSP、MCU 和雷达加速器的单芯片 76GHz 至 81GHz 汽车雷达传感器 AWR1843AOP Single-chip 76-GHz to 81-GHz automotive radar sensor integrating antenna on package, DSP and MCU AWR2243 76GHz 至 81GHz 汽车类第二代高性能 MMIC AWR2944 适用于角雷达和远距离雷达的汽车类第二代 76GHz 至 81GHz 高性能 SoC AWR6443 Single-chip 60-GHz to 64-GHz automotive radar sensor integrating MCU and radar accelerator AWR6843 集成 DSP、MCU 和雷达加速器的单芯片 60GHz 至 64GHz 汽车雷达传感器 AWR6843AOP 集成封装天线、DSP 和 MCU 的单芯片 60GHz 至 64GHz 汽车雷达传感器
工业毫米波雷达传感器
IWR1443 集成 MCU 和硬件加速器的 76GHz 至 81GHz 单芯片毫米波传感器 IWR1642 集成 DSP 和 MCU 的 76GHz 至 81GHz 单芯片毫米波传感器 IWR1843 集成 DSP、MCU 和雷达加速器的 76GHz 至 81GHz 单芯片工业雷达传感器 IWR6443 集成 MCU 和硬件加速器的 60GHz 至 64GHz 单芯片毫米波传感器 IWR6843 集成有处理功能的 60GHz 至 64GHz 单芯片智能毫米波传感器 IWR6843AOP 具有集成封装天线 (AoP) 的单芯片 60GHz 至 64GHz 智能毫米波传感器
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SPRC090 — TMS320C6000 芯片支持库

芯片支持库 (CSL) 提供了一个应用程序编程接口 (API),用于配置和控制 DSP 片上外设,以实现易用性、各种 C6000 器件间的兼容性以及硬件抽象。通过本身的标准性和可移植性,可缩短开发时间。特性部分中列出的功能专为以下器件设计:C6201、C6202、C6203、C6204、C6205、C6211、C6410、C6412、C6413、C6414、C6415、C6416、C6418、C6701、C6711、C6712、C6713、DA610、DM640、DM641 和 DM642。

特性

模块名称外设说明
高速缓存高速缓存
DAT与器件无关的数据复制/填充
DMA直接存储器访问
EDMA (...)
驱动程序或库

SPRC122 — C62x/C64x 快速运行时支持 (RTS) 库

C62x/64x FastRTS Library 是优化型浮点函数库,适用于使用 TMS320C62x 或 TMS320C64x 器件的 C 语言编程器。这些例程通常用于计算密集型实时应用,在这些应用中,提高执行速度至关重要。通过将当前的浮点库 (RTS) 函数替换为 FastRTS Library,可以在不重写现有代码的情况下大大加快执行速度。

该版本还包括 FastRTS Library 中可用函数子集的 C 语言实施。C 代码可让用户内联这些函数并获得更高性能。

特性

单精度和双精度数学函数 单精度和双精度转换函数
浮点加法 将浮点值转换为 32 位带符号整数值
将 32 位带符号整数值转换为浮点值
(...)
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SPRC264 — TMS320C6000 图像库 (IMGLIB)

C5000/6000 Image Processing Library (IMGLIB) is an optimized image/video processing function library for C programmers. It includes C-callable general-purpose image/video processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)
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SPRC265 — TMS320C6000 DSP 库 (DSPLIB)

TMS320C6000 Digital Signal Processor Library (DSPLIB) is a platform-optimized DSP function library for C programmers. It includes C-callable, general-purpose signal-processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)
软件编解码器

ADT-3P-DSPVOIPCODECS — 自适应数字技术 DSP VOIP、语音和音频编解码器

Adaptive Digital 是音质增强算法的开发公司,提供可与 TI DSP 配合使用的一流声学回声消除软件。Adaptive Digital 在算法开发、实施、优化和配置调优方面具有丰富的经验。他们提供适用于语音技术、音质软件、回声消除、会议软件、语音压缩算法的解决方案和即用型解决方案。

如需了解有关 Adaptive Digital 的更多信息,请访问 https://www.adaptivedigital.com
发件人: Adaptive Digital Technologies, Inc.
软件编解码器

COUTH-3P-DSPVOIPCODECS — CouthIT DSP VoIP、语音和音频编解码器

自 1999 年以来,CouthIT 一直帮助客户将其理念转换成强大可靠的实时软件解决方案。CouthIT 许可在 VoIP 以及语音和音频编解码器领域内使用预先构建且高度优化的专用软件模块,并为多媒体应用提供软件优化和定制服务。我们的目标客户是寻求 DSP 平台(包括 TI C5000™ DSP)上嵌入式软件模块支持的 OEM 和 ODM。

如需了解有关 CouthIT 的更多信息,请访问 http://www.couthit.com
发件人: Couth Infotech Pvt. Ltd.
软件编解码器

VOCAL-3P-DSPVOIPCODECS — Vocal Technologies DSP VoIP 编解码器

经过 25 年以上的组装和 C 代码开发,VOCAL 的模块化软件套件可用于各种各样的 TI DSP 产品。产品具体包括 ATA、VoIP 服务器和网关、基于 HPNA 的 IPBX、视频监控、语音和视频会议、语音和数据射频器件、RoIP 网关、政务安全器件、合法拦截软件、医疗设备、嵌入式调制解调器、T.38 传真和 FoIP。

如需了解有关 Vocal Technologies 的更多信息,请访问 https://www.vocal.com
发件人: VOCAL Technologies, Ltd.
仿真模型

C6414, C6415, C6416 GLZ IBIS Model Silicon Revision 1.1 and 2.0 (Rev. D) C6414, C6415, C6416 GLZ IBIS Model Silicon Revision 1.1 and 2.0 (Rev. D)

仿真模型

C6414, C6415, C6416 GLZ BSDL Model (Silicon Revision 1.1) (Rev. C) C6414, C6415, C6416 GLZ BSDL Model (Silicon Revision 1.1) (Rev. C)

仿真模型

C6414, C6415, C6416 GLZ BSDL Model (Silicon Revision 2.0) C6414, C6415, C6416 GLZ BSDL Model (Silicon Revision 2.0)

设计工具

PROCESSORS-3P-SEARCH Arm-based MPU, arm-based MCU and DSP third-party search tool

TI has partnered with companies to offer a wide range of software, tools, and SOMs using TI processors to accelerate your path to production. Download this search tool to quickly browse our third-party solutions and find the right third-party to meet your needs. The software, tools and modules (...)
原理图

TMS320C6414/C6415/C6416 Reference Design TMS320C6414/C6415/C6416 Reference Design

封装 引脚数 下载
FCBGA (GLZ) 532 了解详情
FCBGA (ZLZ) 532 了解详情

订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 认证摘要
  • 持续可靠性监测

推荐产品可能包含与 TI 此产品相关的参数、评估模块或参考设计。

支持与培训

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