产品详情

Number of channels 2 Architecture DSL Line Driver Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 9 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 32 BW at Acl (MHz) 175 Acl, min spec gain (V/V) 1 Vn at flatband (typ) (nV√Hz) 10 Vn at 1 kHz (typ) (nV√Hz) 13 Iq per channel (typ) (mA) 3.4 Vos (offset voltage at 25°C) (max) (mV) 7 Rail-to-rail No Rating Catalog Operating temperature range (°C) -40 to 85 CMRR (typ) (dB) 90 Input bias current (max) (pA) 10000000 Offset drift (typ) (µV/°C) 15 GBW (typ) (MHz) 175 Iout (typ) (mA) 85 2nd harmonic (dBc) 81 3rd harmonic (dBc) 87 Frequency of harmonic distortion measurement (MHz) 1
Number of channels 2 Architecture DSL Line Driver Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 9 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 32 BW at Acl (MHz) 175 Acl, min spec gain (V/V) 1 Vn at flatband (typ) (nV√Hz) 10 Vn at 1 kHz (typ) (nV√Hz) 13 Iq per channel (typ) (mA) 3.4 Vos (offset voltage at 25°C) (max) (mV) 7 Rail-to-rail No Rating Catalog Operating temperature range (°C) -40 to 85 CMRR (typ) (dB) 90 Input bias current (max) (pA) 10000000 Offset drift (typ) (µV/°C) 15 GBW (typ) (MHz) 175 Iout (typ) (mA) 85 2nd harmonic (dBc) 81 3rd harmonic (dBc) 87 Frequency of harmonic distortion measurement (MHz) 1
HVSSOP (DGN) 8 14.7 mm² 3 x 4.9 SOIC (D) 8 29.4 mm² 4.9 x 6
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  • 引脚镀层/焊球材料
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  • 封装厂地点

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