产品详情

Technology family LVxT Number of channels 4 Vout (min) (V) 1.65 Vout (max) (V) 5.5 IOH (max) (mA) -8 IOL (max) (mA) 8 Supply current (max) (µA) 2 Features Balanced outputs, Over-voltage tolerant inputs, Voltage translation Input type Standard CMOS, TTL-Compatible CMOS Output type Push-Pull Operating temperature range (°C) -55 to 125
Technology family LVxT Number of channels 4 Vout (min) (V) 1.65 Vout (max) (V) 5.5 IOH (max) (mA) -8 IOL (max) (mA) 8 Supply current (max) (µA) 2 Features Balanced outputs, Over-voltage tolerant inputs, Voltage translation Input type Standard CMOS, TTL-Compatible CMOS Output type Push-Pull Operating temperature range (°C) -55 to 125
TSSOP (PW) 14 32 mm² 5 x 6.4
  • Wide operating range of 1.8 V to 5.5 V
  • Single-supply voltage translator (refer to LVxT Enhanced Input Voltage):

    • Up translation:
      • 1.2 V to 1.8 V
      • 1.5 V to 2.5 V
      • 1.8 V to 3.3 V
      • 3.3 V to 5.0 V
    • Down translation:
      • 5.0 V, 3.3 V, 2.5 V to 1.8 V
      • 5.0 V, 3.3 V to 2.5 V
      • 5.0 V to 3.3 V
  • 5.5-V tolerant input pins
  • Supports standard pinouts
  • Up to 150Mbps with 5-V or 3.3-V V CC
  • Latch-up performance exceeds 250 mA per JESD 17
  • Supports defense, aerospace, and medical applications:
    • Controlled baseline
    • One assembly and test site
    • One fabrication site
    • Extended product life cycle
    • Product traceability
  • Wide operating range of 1.8 V to 5.5 V
  • Single-supply voltage translator (refer to LVxT Enhanced Input Voltage):

    • Up translation:
      • 1.2 V to 1.8 V
      • 1.5 V to 2.5 V
      • 1.8 V to 3.3 V
      • 3.3 V to 5.0 V
    • Down translation:
      • 5.0 V, 3.3 V, 2.5 V to 1.8 V
      • 5.0 V, 3.3 V to 2.5 V
      • 5.0 V to 3.3 V
  • 5.5-V tolerant input pins
  • Supports standard pinouts
  • Up to 150Mbps with 5-V or 3.3-V V CC
  • Latch-up performance exceeds 250 mA per JESD 17
  • Supports defense, aerospace, and medical applications:
    • Controlled baseline
    • One assembly and test site
    • One fabrication site
    • Extended product life cycle
    • Product traceability

The SN74LV4T32-EP contains four independent 2-input OR Gates with Schmitt-trigger inputs. Each gate performs the Boolean function Y = A + B in positive logic. The output level is referenced to the supply voltage (V CC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.

The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output).

The SN74LV4T32-EP contains four independent 2-input OR Gates with Schmitt-trigger inputs. Each gate performs the Boolean function Y = A + B in positive logic. The output level is referenced to the supply voltage (V CC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.

The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output).

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类型 标题 下载最新的英语版本 日期
* 数据表 SN74LV4T32-EPQuadruple 2-Input Positive-OR GatesWith Integrated Translation 数据表 PDF | HTML 2023年 11月 15日
* 辐射与可靠性报告 SN74LV4T32-EP Enhanced Product Qualification and Reliability Report PDF | HTML 2023年 11月 22日

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评估板

14-24-LOGIC-EVM — 采用 14 引脚至 24 引脚 D、DB、DGV、DW、DYY、NS 和 PW 封装的逻辑产品通用评估模块

14-24-LOGIC-EVM 评估模块 (EVM) 旨在支持采用 14 引脚至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。

用户指南: PDF | HTML
英语版 (Rev.B): PDF | HTML
TI.com 上无现货
评估板

14-24-NL-LOGIC-EVM — 采用 14 引脚至 24 引脚无引线封装的逻辑产品通用评估模块

14-24-EVM 是一款灵活的评估模块 (EVM),旨在支持具有 14 引脚至 24 引脚 BQA、BQB、RGY、RSV、RJW 或 RHL 封装的任何逻辑或转换器件。

用户指南: PDF | HTML
英语版 (Rev.A): PDF | HTML
TI.com 上无现货
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订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息:
  • 制造厂地点
  • 封装厂地点

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