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参数

Number of channels (#) 2 Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 5.5 Technology Family LV-A Input type Schmitt-Trigger Output type Push-Pull ICC (uA) 20 IOL (Max) (mA) 12 IOH (Max) (mA) -12 Features Balanced outputs, High speed (tpd 10-50ns), Over-voltage tolerant inputs, Partial power down (Ioff), Retriggerable open-in-new 查找其它 单稳多谐振荡器(单稳态)

封装|引脚|尺寸

SOIC (D) 16 59 mm² 9.9 x 6 SOP (NS) 16 80 mm² 10.2 x 7.8 SSOP (DB) 16 48 mm² 6.2 x 7.8 TSSOP (PW) 16 22 mm² 5 x 4.4 TSSOP (PW) 16 22 mm² 4.4 x 5 TVSOP (DGV) 16 23 mm² 3.6 x 6.4 VQFN (RGY) 16 14 mm² 4 x 3.5 open-in-new 查找其它 单稳多谐振荡器(单稳态)

特性

  • 2-V to 5.5-V VCC Operation
  • Maximum tpd of 11 ns at 5 V
  • Typical VOLP (Output Ground Bounce)
    < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    > 2.3 V at VCC = 3.3 V, TA = 25°C
  • Support Mixed-Mode Voltage Operation on
    All Ports
  • Schmitt-Trigger Circuitry on A, B, and CLR Inputs
    for Slow Input Transition Rates
  • Edge Triggered From Active-High or
    Active-Low Gated Logic Inputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Retriggerable for Very Long Output Pulses,
    up to 100% Duty Cycle
  • Overriding Clear Terminates Output Pulse
  • Glitch-Free Power-Up Reset on Outputs
  • Latch-Up Performance Exceeds 100 mA Per
    JESD 78, Class 11
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
open-in-new 查找其它 单稳多谐振荡器(单稳态)

描述

The ’LV123A devices are dual retriggerable monostable multivibrators designed for 2-V to 5.5-V VCC operation.

These edge-triggered multivibrators feature output pulse-duration control by three methods. In the first method, the A input is low, and the B input goes high. In the second method, the B input is high, and the A input goes low. In the third method, the A input is low, the B input is high, and the clear (CLR) input goes high.

The output pulse duration is programmable by selecting external resistance and capacitance values. The external timing capacitor must be connected between Cext and Rext/Cext (positive) and an external resistor connected between Rext/Cext and VCC. To obtain variable pulse durations, connect an external variable resistance between Rext/Cext and VCC. The output pulse duration also can be reduced by taking CLR low.

open-in-new 查找其它 单稳多谐振荡器(单稳态)
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技术文档

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类型 标题 下载最新的英文版本 日期
* 数据表 SNx4LV123A Dual Retriggerable Monostable Multivibrators With Schmitt-Trigger Inputs 数据表 (Rev. Q) 2015年 8月 31日
应用手册 使用 SN74LVC1G123 单稳多谐振荡器进行设计 (Rev. A) 2020年 3月 13日
选择指南 Logic Guide (Rev. AB) 2017年 6月 12日
选择指南 逻辑器件指南 2014 (Rev. AA) 下载最新的英文版本 (Rev.AB) 2014年 11月 17日

设计与开发

有关其他条款或所需资源,请点击下面的任何链接来查看详情页面。

硬件开发

评估板 下载
document-generic 用户指南
10
说明
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
特性
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices
评估板 下载
document-generic 用户指南
20
说明
Flexible EVM designed to support any logic or translation device that has a BQA, BQB, RGY (14-24 pin), RSV, RJW, or RHL package.
特性
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic and translation devices with included dual supply support
  • Board has 9 sections that can be broken apart for a smaller form factor

设计工具和仿真

仿真模型 下载
SCEM125A.ZIP (21 KB) - IBIS Model
仿真模型 下载
SCEM569C.ZIP (384 KB) - PSpice Model
仿真模型 下载
SCLJ019.ZIP (111 KB) - HSpice Model

CAD/CAE 符号

封装 引脚 下载
SO (NS) 16 了解详情
SOIC (D) 16 了解详情
SSOP (DB) 16 了解详情
TSSOP (PW) 16 了解详情
TVSOP (DGV) 16 了解详情
VQFN (RGY) 16 了解详情

订购与质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/FIT 估算
  • 材料成分
  • 认证摘要
  • 持续可靠性监测

支持与培训

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