封装信息
| 封装 | 引脚 TSSOP (PW) | 16 |
| 工作温度范围 (°C) -40 to 85 |
| 包装数量 | 包装 90 | TUBE |
SN65MLVD047 的特性
- Differential Line Drivers for 30-
Loads and Data Rates(1) Up to 200 Mbps, Clock Frequencies up to 100 MHz - Supports Multipoint Bus Architectures
- Operates from a Single 3.3-V Supply
- Characterized for Operation from -40°C to 85°C
- 16-Pin SOIC (JEDEC MS-012) and 16-Pin TSSOP (JEDEC MS-153) Packaging
- APPLICATIONS
- Clock Distribution
- Backplane or Cabled Multipoint Data Transmission in Telecommunications, Automotive, Industrial, and Other Computer Systems
- Cellular Base Stations
- Central-Office and PBX Switching
- Bridges and Routers
- Low-Power High-Speed Short-Reach Alternative to TIA/EIA-485
(1) The data rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).
SN65MLVD047 的说明
The SN65MLVD047 is a quadruple line driver. The output current of this device has been increased, in comparison to standard LVDS compliant devices, in order to support doubly terminated transmission lines and heavily loaded backplane bus applications. Backplane applications generally require impedance matching termination resistors at both ends of the bus. The effective impedance of a doubly terminated bus can be as low as 30 . The SN65MLVD047 devices allow for multiple drivers to be present on a single bus. Driver edge rate control is incorporated to support operation. The SN65MLVD047 provides 9-kV ESD protection on all bus pins.