LM25115A
- Power-up/Power-down Tracking
- Self-synchronization to Main Channel Output
- Leading Edge Pulse Width Modulation
- Valley Current Mode Control
- Standalone DC/DC Synchronous Buck Mode
- Operates from AC or DC Input up to 42V
- Wide 4.5V to 30V Bias Supply Range
- Wide 0.75V to 13.5V Output Range.
- Top and Bottom Gate Drivers Sink 2.5A Peak
- Adaptive Gate Driver Dead-time Control
- Wide Bandwidth Error Amplifier (4MHz)
- Programmable Soft-start
- Thermal Shutdown Protection
- TSSOP-16 package
All trademarks are the property of their respective owners.
The LM25115A controller contains all of the features necessary to produce multiple tracking outputs using the Secondary Side Post Regulation (SSPR) technique. The SSPR technique develops a highly efficient and well regulated auxiliary output from the secondary side switching waveform of an isolated power converter. LM25115A can be also used as a standalone DC/DC synchronous buck controller (Refer to section). Regulation of the auxiliary output voltage is achieved by leading edge pulse width modulation (PWM) of the main channel duty cycle. Leading edge modulation is compatible with either current mode or voltage mode control of the main output. The LM25115A drives external high-side and low-side NMOS power switches configured as a synchronous buck regulator. A current sense amplifier provides overload protection and operates over a wide common mode input range. Additional features include a low dropout (LDO) bias regulator, error amplifier, precision reference, adaptive dead time control of the gate signals and thermal shutdown.
技术文档
类型 | 标题 | 下载最新的英语版本 | 日期 | |||
---|---|---|---|---|---|---|
* | 数据表 | Secondary Side Post Regulator/DC-DC Converter with Power-Up/Pwr-Down Trac 数据表 (Rev. B) | 2013年 4月 1日 | |||
选择指南 | 电源管理指南 2018 (Rev. K) | 2018年 7月 31日 | ||||
选择指南 | 电源管理指南 2018 (Rev. R) | 2018年 6月 25日 | ||||
模拟设计期刊 | Reduce buck-converter EMI and voltage stress by minimizing inductive parasitics | 2016年 7月 21日 | ||||
EVM 用户指南 | AN-1368 LM5115/5025A Evaluation Board (Rev. A) | 2013年 4月 26日 | ||||
EVM 用户指南 | AN-1367 LM5115 HV DC Evaluation Board (Rev. B) | 2013年 4月 24日 | ||||
EVM 用户指南 | AN-1542 LM5115A Evaluation Board (Rev. B) | 2013年 4月 24日 | ||||
应用手册 | Minimizing FET Losses For a High Input Rail Buck Converter (Rev. A) | 2013年 4月 23日 | ||||
应用手册 | Minimizing FET Losses For a High Input Rail Buck Converter (cn) | 最新英语版本 (Rev.A) | 2007年 9月 5日 | |||
用户指南 | Application Note 1542 LM5115A Evaluation Board (cn) | 2007年 3月 17日 | ||||
用户指南 | Application Note 1367 LM5115 HV DC Evaluation Board (cn) | 2005年 10月 18日 |
设计和开发
如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。
封装 | 引脚 | CAD 符号、封装和 3D 模型 |
---|---|---|
TSSOP (PW) | 16 | Ultra Librarian |
订购和质量
- RoHS
- REACH
- 器件标识
- 引脚镀层/焊球材料
- MSL 等级/回流焊峰值温度
- MTBF/时基故障估算
- 材料成分
- 鉴定摘要
- 持续可靠性监测
- 制造厂地点
- 封装厂地点