DS90LV049

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400Mbps LVDS 双路高速差动收发器

产品详情

Function Transceiver Protocols LVDS Number of transmitters 2 Number of receivers 2 Signaling rate (Mbps) 400 Input signal LVCMOS, LVDS, LVTTL Output signal LVCMOS, LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Transceiver Protocols LVDS Number of transmitters 2 Number of receivers 2 Signaling rate (Mbps) 400 Input signal LVCMOS, LVDS, LVTTL Output signal LVCMOS, LVDS Rating Catalog Operating temperature range (°C) -40 to 85
TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm)
  • Up to 400 Mbps Switching Rates
  • Flow-Through Pinout Simplifies PCB Layout
  • 50 ps Typical Driver Channel-to-Channel Skew
  • 50 ps Typical Receiver Channel-to-Channel Skew
  • 3.3 V Single Power Supply Design
  • TRI-STATE Output Control
  • Internal Fail-Safe Biasing of Receiver Inputs
  • Low Power Dissipation (70 mW at 3.3 V Static)
  • High Impedance on LVDS Outputs on Power Down
  • Conforms to TIA/EIA-644-A LVDS Standard
  • Industrial Operating Temperature Range (−40°C to +85°C)
  • Available in Low Profile 16 Pin TSSOP Package

All trademarks are the property of their respective owners.

  • Up to 400 Mbps Switching Rates
  • Flow-Through Pinout Simplifies PCB Layout
  • 50 ps Typical Driver Channel-to-Channel Skew
  • 50 ps Typical Receiver Channel-to-Channel Skew
  • 3.3 V Single Power Supply Design
  • TRI-STATE Output Control
  • Internal Fail-Safe Biasing of Receiver Inputs
  • Low Power Dissipation (70 mW at 3.3 V Static)
  • High Impedance on LVDS Outputs on Power Down
  • Conforms to TIA/EIA-644-A LVDS Standard
  • Industrial Operating Temperature Range (−40°C to +85°C)
  • Available in Low Profile 16 Pin TSSOP Package

All trademarks are the property of their respective owners.

The DS90LV049 is a dual CMOS flow-through differential line driver-receiver pair designed for applications requiring ultra low power dissipation, exceptional noise immunity, and high data throughput. The device is designed to support data rates in excess of 400 Mbps utilizing Low Voltage Differential Signaling (LVDS) technology.

The DS90LV049 drivers accept LVTTL/LVCMOS signals and translate them to LVDS signals. On the other hand, the receivers accept LVDS signals and translate them to 3 V CMOS signals. The LVDS input buffers have internal failsafe biasing that places the outputs to a known H (high) state for floating receiver inputs. In addition, the DS90LV049 supports a TRI-STATE function for a low idle power state when the device is not in use.

The EN and EN inputs are ANDed together and control the TRI-STATE outputs. The enables are common to all four gates.

The DS90LV049 is a dual CMOS flow-through differential line driver-receiver pair designed for applications requiring ultra low power dissipation, exceptional noise immunity, and high data throughput. The device is designed to support data rates in excess of 400 Mbps utilizing Low Voltage Differential Signaling (LVDS) technology.

The DS90LV049 drivers accept LVTTL/LVCMOS signals and translate them to LVDS signals. On the other hand, the receivers accept LVDS signals and translate them to 3 V CMOS signals. The LVDS input buffers have internal failsafe biasing that places the outputs to a known H (high) state for floating receiver inputs. In addition, the DS90LV049 supports a TRI-STATE function for a low idle power state when the device is not in use.

The EN and EN inputs are ANDed together and control the TRI-STATE outputs. The enables are common to all four gates.

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技术文档

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 DS90LV049 3V LVDS Dual Line Driver with Dual Line Receiver 数据表 (Rev. D) 2013-4-18
应用手册 低压差分信号 (LVDS) 在 LED 灯墙中的应用 英语版 2022-5-19
应用手册 Applications of Low-Voltage Differential Signaling (LVDS) in Ultrasound Scanners 2019-6-29
应用简报 LVDS to Improve EMC in Motor Drives 2018-9-27
应用手册 An Overview of LVDS Technology 1998-10-5

设计与开发

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评估板

DS90LV047-48AEVM — DS90LV047-48AEVM 评估模块

DS90LV047-48AEVM 是一款评估模块 (EVM),专为评估德州仪器 (TI) DS90LV047A 3V LVDS 四通道 CMOS 差动线路驱动器和 DS90LV048A 3V LVDS CMOS 差动线路接收器的性能和功能而设计。借助此套件,用户可在 DS90LV047A 和 DS90LV048A 的支持下快速评估输出波形特性和信号完整性。可通过接头引脚访问 DS90LV047A 和 DS90LV048A 输入和输出,还有助于连接到实验室设备或用户系统以进行性能评估。
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仿真模型

DS90LV049 IBIS Model

SNLM024.ZIP (18 KB) - IBIS 模型
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封装 引脚 CAD 符号、封装和 3D 模型
TSSOP (PW) 16 Ultra Librarian

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