主页 接口 LVDS、M-LVDS 和 PECL IC
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LVDS、M-LVDS 和 PECL IC

DS90LV048A

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400Mbps LVDS 四路高速差分接收器

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数据表

DS90LV048A

正在供货
数据表 立即订购

产品详情

Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Signaling rate (Mbps) 400 Input signal LVDS Output signal LVTTL, TTL Rating Catalog Operating temperature range (°C) -40 to 85
Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Signaling rate (Mbps) 400 Input signal LVDS Output signal LVTTL, TTL Rating Catalog Operating temperature range (°C) -40 to 85
TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm) SOIC (D) 16 59.4 mm² (9.9 mm × 6 mm)
  • > 400-Mbps (200-MHz) Switching Rates
  • Flow-Through Pinout Simplifies PCB Layout
  • 150-ps Channel-to-Channel Skew (Typical)
  • 100-ps Differential Skew (Typical)
  • 2.7-ns Maximum Propagation Delay
  • 3.3-V Power Supply Design
  • High Impedance LVDS Inputs on Power Down
  • Low Power Design (40 mW at 3.3-V Static)
  • Interoperable With Existing 5-V LVDS Drivers
  • Accepts Small Swing (350 mV Typical) Differential Signal Levels
  • Supports Input Failsafe
    • Open, Short, and Terminated
  • 0 V to –100 mV Threshold Region
  • Conforms to ANSI/TIA/EIA-644 Standard
  • Operating Temperature Range: –40°C to +85°C
  • Available in SOIC and TSSOP Package
  • > 400-Mbps (200-MHz) Switching Rates
  • Flow-Through Pinout Simplifies PCB Layout
  • 150-ps Channel-to-Channel Skew (Typical)
  • 100-ps Differential Skew (Typical)
  • 2.7-ns Maximum Propagation Delay
  • 3.3-V Power Supply Design
  • High Impedance LVDS Inputs on Power Down
  • Low Power Design (40 mW at 3.3-V Static)
  • Interoperable With Existing 5-V LVDS Drivers
  • Accepts Small Swing (350 mV Typical) Differential Signal Levels
  • Supports Input Failsafe
    • Open, Short, and Terminated
  • 0 V to –100 mV Threshold Region
  • Conforms to ANSI/TIA/EIA-644 Standard
  • Operating Temperature Range: –40°C to +85°C
  • Available in SOIC and TSSOP Package

The DS90LV048A device is a quad CMOS flow-through differential line receiver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.

The DS90LV048A accepts low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports open, shorted, and terminated (100-Ω) input fail-safe. The receiver output is HIGH for all fail-safe conditions. The DS90LV048A has a flow-through pinout for easy PCB layout.

The EN and EN∗ inputs are ANDed together and control the TRI-STATE outputs. The enables are common to all four receivers. The DS90LV048A and companion LVDS line driver (for example, DS90LV047A) provide a new alternative to high-power PECL/ECL devices for high-speed point-to-point interface applications.

The DS90LV048A device is a quad CMOS flow-through differential line receiver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.

The DS90LV048A accepts low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports open, shorted, and terminated (100-Ω) input fail-safe. The receiver output is HIGH for all fail-safe conditions. The DS90LV048A has a flow-through pinout for easy PCB layout.

The EN and EN∗ inputs are ANDed together and control the TRI-STATE outputs. The enables are common to all four receivers. The DS90LV048A and companion LVDS line driver (for example, DS90LV047A) provide a new alternative to high-power PECL/ECL devices for high-speed point-to-point interface applications.
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技术文档

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 DS90LV048A 3-V LVDS Quad CMOS Differential Line Receiver 数据表 (Rev. C) PDF | HTML 2016-7-29
应用手册 低压差分信号 (LVDS) 在 LED 灯墙中的应用 英语版 2022-5-19
应用手册 Applications of Low-Voltage Differential Signaling (LVDS) in Ultrasound Scanners 2019-6-29
应用简报 LVDS to Improve EMC in Motor Drives 2018-9-27
应用简报 How Far, How Fast Can You Operate LVDS Drivers and Receivers? 2018-8-3
应用简报 How to Terminate LVDS Connections with DC and AC Coupling 2018-5-16
应用手册 An Overview of LVDS Technology 1998-10-5

设计与开发

如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。

评估板

DS90LV047-48AEVM — DS90LV047-48AEVM 评估模块

DS90LV047-48AEVM 是一款评估模块 (EVM)，专为评估德州仪器 (TI) DS90LV047A 3V LVDS 四通道 CMOS 差动线路驱动器和 DS90LV048A 3V LVDS CMOS 差动线路接收器的性能和功能而设计。借助此套件，用户可在 DS90LV047A 和 DS90LV048A 的支持下快速评估输出波形特性和信号完整性。可通过接头引脚访问 DS90LV047A 和 DS90LV048A 输入和输出，还有助于连接到实验室设备或用户系统以进行性能评估。
用户指南: PDF
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仿真模型

DS90LV048A IBIS Model

SNLM165.ZIP (8 KB) - IBIS 模型
支持的产品和硬件
封装 引脚 CAD 符号、封装和 3D 模型
TSSOP (PW) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian
适用于评估类项目的 TI 标准条款与条件。

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